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NVIDIA 2027 Internships: Hardware Engineering
NVIDIA offers 12-week hardware engineering internships for students pursuing degrees in electrical or computer engineering. Interns work on projects across system validation, hardware design, mechanical engineering, and silicon solutions using tools like Python, Verilog, and various CAD software.
Sr. Staff Embedded Firmware/FPGA Systems Engineer
This role involves leading the architecture and development of embedded firmware and FPGA logic for complex medical instrumentation platforms. The engineer will work with ARM-based SoCs, Linux BSPs, and high-speed data interfaces to optimize system performance in a laboratory environment.
Embedded Firmware Engineer - FPGA Development
Designs and verifies FPGA logic for Microchip PolarFire SoCs using VHDL/Verilog, integrating with RISC-V cores and Linux/RTOS drivers.
ASIC Digital Design, Sr Staff Engineer - 18410
We Are Synopsys is the leader in engineering solutions from silicon to systems, enabling customers to rapidly innovate AI-powered products. We deliver industry-leading silicon design, IP, simulation and analysis…
Design Verification Leader
Role Overview We are seeking a highly experienced Design Verification Leader to lead the definition and execution of scalable, reusable, and high-quality verification strategies for next-generation SoCs targeting AI,…
ASIC Design Verification Engineer
ASIC Design Verification Engineer responsible for owning verification strategy, coverage closure, and system-level testing for AMD’s mixed-signal power management IP, including RTL design and collaboration with analog/firmware teams.
Silicon Design Engineer - Core Debug
Core Debug Engineer at AMD verifies next-gen microprocessor designs, collaborates with RTL engineers, and resolves complex logic bugs to ensure functionality and architectural compliance.
Senior Design Verification Engineer – Physical AI Compute
Design and execute verification plans for a Physical AI SoC using SystemVerilog/UVM, C/C++, assertions, and emulation to validate compute engines, memory, and interconnects.
Senior Staff Front-End Engineer RISC Processor Integration
Configure and integrate RISC processor IP into SoC platforms, customize processor features, develop RTL wrappers and system glue logic, integrate interconnects and interrupt controllers, support verification and system…
Senior Staff Front-End Design Engineer RTL Design RISC-V
Integrate commercial RISC-V core soft IP with external accelerators, tailor CPU features to meet performance, power, and area requirements, modify Verilog and SystemVerilog RTL, collaborate across ASIC design…
Senior/Staff Design Verification Engineer
Join Bitdeer's IC development team to ensure the functional correctness and performance of computer arithmetic IPs. Develop comprehensive verification environments, execute test plans, debug RTL issues, and contribute…
Experienced RTL Design Engineer (3+ Years of Experience)
Designs and implements RTL for SoC PAD/PFC logic (pin multiplexing, I/O control) using Verilog/SystemVerilog, in-house tools, and automation scripts to ensure design quality and integration.