Tech jobs

AI Cloud IoT Perl Python +4 skills

ASIC Digital Design, Sr Engineer - 18436

Open 50d Senior

Alternate Job Titles Design Verification Engineer Digital Verification Engineer RTL Verification Engineer IP Verification Engineer We Are Synopsys is the leader in engineering solutions from silicon to systems,…

Qualcomm

Open 44d On-siteLATAM, North AmericaSenior H-1B sponsor history

VLSI Frontend CAD Applications Engineer, Senior

Company: QUALCOMM SEMICONDUCTORES Y SISTEMAS AVANZADOS DE BAJA CALIFORNIA Job Area: Engineering Group, Engineering Group > ASICS Engineering General Summary: Job Description About Qualcomm: Qualcomm is a global…

Asic Automation CAD Linux Perl +3 skills

TEKsystems

Open 59d On-siteNorth AmericaContract

Validation Engineer

AI Automation Cloud C++ Embedded Software +7 skills

This posting is for an existing vacancy Description Microchip’s Data Center Solutions Business Unit (DCS) delivers industry leading performance, reliability, and security in Storage Controllers, Memory Controllers,…

Advanced Micro Devices, Inc

Open 59d North AmericaContract

Mixed Signal Circuit Design Analysis & CAD Engineer ( Temporary Contract)

This role involves evaluating third-party analog and mixed-signal IP designs for AMD processors, ensuring they meet specifications through pre-silicon verification and CAD automation. The engineer will develop scripts and leverage AI tools to improve design analysis workflows and resolve hardware issues before manufacturing.

AI Asic Automation CAD Cmos +11 skills

Infineon

Open 47d On-siteAPACSenior

System FP&A & Hardware Engineer / Senior Engineer

Vietnam

Join us to drive the development of next-generation FPGA prototyping platforms. In this role, you will architect, integrate, and debug FPGA solutions while collaborating across hardware and software teams to enable…

Automation Embedded Software Ethernet FPGA I2c +8 skills

Advanced Micro Devices, Inc

RTL Design Manager

Open 60d APAC

AI Ai Enablement Asic Automation Cloud +11 skills

Leads a team designing high-performance, low-power System-on-Chip (SOC) components using Verilog/System Verilog, UPF, and industry-standard EDA tools.

Advanced Micro Devices, Inc

Senior RTL design engineer - SOC Intergration

Open 130d APACSenior

AI Asic Embedded Systems Git Perforce +7 skills

RTL/SOC integration design engineer at AMD Hyderabad, responsible for ASIC design in sub-20nm nodes using Verilog/SystemVerilog, timing analysis, low-power design, and SOC verification tools.

Lumilens

AI Automation Fiber Iso 9001 LabVIEW +4 skills

Assistant Test Engineer - Optical Manufacturing

Open 60d APAC

Thailand

Hands-on test engineer performing functional, performance, and reliability testing on optical transceiver products (SFP, QSFP, etc.) in a manufacturing setting, operating test equipment like BERTs, oscilloscopes, and optical power meters, with some scripting in Python or LabVIEW.

WATT AI PTE. LTD.

Open 60d HybridAPAC Ireland permit employer

ASIC Physical Design Engineer

Open 97d APAC

Singapore

Designs and optimizes integrated circuit layouts from RTL to GDSII using advanced EDA tools, focusing on floorplanning, placement, clock tree synthesis, routing, and physical verification for SoC projects.

Design Engineer- Memory Design

Accessibility AI Automation Bash IoT +2 skills

Role Purpose The Physical IP Division in Arm Noida creates Memory IPs which are extensively used by thousands of SoC designers around the world to design leading edge chips. We are currently developing memory fast…

Intel

Open 60d HybridNorth America Ireland permit employer

EDA Tools Software Engineer

AI Automation Bash CAD Cadence Virtuoso +10 skills

As a Design Administrator, you enable and support engineering infrastructure, EDA environments, and automation frameworks for Intel's technology development. Core technologies include EDA tools (Cadence Virtuoso, Calibre, IC Validator), DevOps, CI/CD, and scripting (Python, Shell, TCL, Perl).

129K – 245K $

Cadence

Open 59d North AmericaPrincipal

Sr Principal Design Engineer

Agile Bash Perl Root Cause Analysis Rtl +3 skills

At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology. Position Overview As a Senior Principal Design Engineer, you will be responsible for the design,…

Blue Origin

Open 59d North AmericaFull-time

SLD Avionics FPGA Engineer III - Lunar Permanence

Asic FPGA Git I2c Perl +7 skills

Application close date: Applications will be accepted on an ongoing basis until the requisition is closed. At Blue Origin, we envision millions of people living and working in space for the benefit of Earth. We’re…

Micron Technology

Open 59d North AmericaPrincipal

Principal Engineer, RET Design

AI Corrective Action C++ Perl Python +1 skills

The Principal Engineer will develop and optimize Resolution Enhancement Techniques (RET) and Optical Proximity Correction (OPC) solutions to improve wafer patterning for advanced memory technologies. The role involves leading mask development projects, collaborating across R&D and manufacturing, and mentoring engineers in lithography optimization.

Altera Corporation

Open 59d North AmericaSenior

Senior Backend Design Automation Engineer — New Process Node Enablement

AI Automation Bash Cloud FPGA +6 skills

The Senior Backend Design Automation Engineer will develop and maintain backend design flows for new semiconductor process nodes, integrating PDKs and EDA tools to support FPGA design teams. The role involves modernizing design infrastructure and applying automation and AI/ML techniques to optimize flow development and regression testing.

149K – 216K $

Altera Corporation

Transceivers & Protocol IP Application Engineer

Open 59d North America

Automation Bash Corrective Action C++ Ethernet +10 skills

Job Details: Job Description: Altera is seeking a technically strong Transceivers & Protocol IP Application Engineer to be based in San Jose California Altera Office to help customers and partners successfully…

Cadence

Lead Design Engineer

Open 59d APACLead

Automation Bash Firmware PCIe Perl +5 skills

At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology. Job Profile Role Title Lead Design Engineer, SoC / Subsystem / IP Design Experience 4to 18 years…

Texas Instruments

Open 57d North America Licensed UK sponsor Licensed NL sponsor

Design Verification Engineer

AI Automation Machine Learning Perl Python +2 skills

Design Verification Engineer responsible for developing verification plans, test benches, and running regressions to ensure first-pass silicon success for analog and mixed-signal ICs at Texas Instruments in Dallas.

Synopsys