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S - Power / Low Power ASIC Design Engineer｜全球知名CPU、GPU大廠（台北／新竹）
【工作內容】 •Perform RTL and gate-level power estimation, analysis, and profiling for CPU / GPU / SoC designs. •Use PrimePower RTL (PPRTL) and PrimeTime PX (PTPX) to analyze power consumption across different design stages…
5G手機,AR,VR 顯示技術 數位IC驗證工程師(M1)
【產品線描述】 AMOLED, AR, VR, TDDI等面板驅動IC與觸控IC設計 【工作說明】 1.規劃建置DDIC系統數位DV (Design Verification)的UVM架構平台 2.建置驗證Model來優化信號驗證的效率 【必要條件】 1. 具系統DV (Design Verification) 建置能力 2. 熟悉UVM (Universal Verification Methodology) Flow, RAL…
[新竹]SOC Digital Implementation Designer
SOC-PI team is hiring both junior and senior engineers, whose work scope is physical design from RTL to GDS: design quality check, synthesis, formal check, partitioning, constraint (for both design and process), async…
FY27 Intern - QDSP Hardware Physical Design Internship - Canada (12 or 16 months)
Company: Qualcomm Canada ULC Job Area: Interns Group, Interns Group > Interim Engineering Intern - HW Qualcomm Overview: Qualcomm is a company of inventors that unlocked 5G ushering in an age of rapid acceleration in…
Intern - Design Engineer, HBM
Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into…
Physical Design Engineer
Company: Qualcomm Technologies, Inc. Job Area: Engineering Group, Engineering Group > ASICS Engineering General Summary: As a leading technology innovator, Qualcomm pushes the boundaries of what's possible to enable…
Intern - Design Engineer, HBM
Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into…
Intégrateur informatique (H/F)
Description du poste :En tant qu'organisateur de forums de recrutement, Talents Handicap accompagne de très nombreuses entreprises & organisations en France dans leurs recrutements de collaborateurs en situation de…
Sr Staff, Physical Design Architect (Flow & ML Automation)
Leads RTL-to-GDS physical implementation methodology for high-speed RISC-V CPU cores at SiFive, architecting best-in-class flows for TSMC N3/N2 nodes, scaling ML-driven PPA optimization (e.g., Synopsys DSO.ai), and building automated, 'Flows-as-Code' systems in Python/Tcl/Perl.
CAx Systemadministrator (w/m/d) (IT-Systemadministrator/in)
Wenn Sie gemeinsam mit uns interessante und herausfordernde Projekte im Bereich Versuch- und Testing umsetzen wollen und eine attraktive sowie abwechslungsreiche berufliche Tätigkeit suchen, sind Sie bei Brunel…
Full Stack Developer - Python and React
A 12-month contract in Montréal (on-site 3x/week) for a full stack developer building scalable solutions with Python (7+ yrs) and React (5+ yrs) in global agile teams. The role emphasizes clean code, unit testing, RDBMS/NoSQL databases, Linux/shell skills, and leveraging Generative AI tools.
Market Data Engineer (Linux)
Supports and maintains real-time market data platforms for Parameta Solutions (TP ICAP's Data & Analytics division) in Manila — monitoring feeds, troubleshooting data quality and latency issues, and optimizing low-latency pipelines on Linux (Red Hat) systems using Bash/Perl/Tcl scripting, SQL, and some cloud (AWS) infrastructure.
Lead Java Software Engineer
Lead Software Engineer at JPMorganChase's Commercial & Investment Banking unit in the Philippines: guides a team of engineers day to day while staying hands-on in code, building secure, scalable banking applications with Java (Core & EE, Spring Boot), Python, Sybase/Oracle databases, CI/CD tooling, and messaging technologies like Kafka.
Verification Designer
Leads end-to-end block- and system-level verification of ASIC/FPGA designs for client projects at an electronics design services firm — building UVM, formal, and assertion-based environments, driving coverage closure, and automating regressions with Python/Perl/Tcl. Fully remote; U.S. person status required (ITAR/EAR).
System Security Engineer
Cybersecurity engineer/architect on Kaufman Rossin's internal Information Security team in Bangalore, administering security tooling (SIEM/SOAR, IDS/IPS, endpoint protection, IAM), monitoring for threats, and advising on security improvements. Core stack includes Linux/Windows, packet capture analysis, and scripting in Python/PowerShell.
Software Engineer II - Onsite
Software Engineer II at Raytheon (RTX) in Tucson, AZ, building software that controls Hardware-in-the-Loop facilities — flight simulators used to test missiles before flight. Day-to-day involves real-time software design, coding, integration, and build/systems work on a multi-disciplinary team; requires US citizenship, a Secret security clearance, and a Master's in a STEM field.
Senior Software Engineer — Data Pipelines & ETL (Hybrid)
Maintains data update processes for FactSet's Symbology Direct Feeds and builds web tools that keep data consistent across global teams. Day-to-day work centers on Perl, Python, and SQL Server in an Agile, hybrid (onsite/remote) setup in Metro Manila, including on-call duties and collaboration with US and London colleagues.