Tech jobs

Analytics AWS Azure Bash Cloud +16 skills

Market Data Engineer

Open 62d APAC

Singapore

Manage and optimize real-time financial market data systems at TP ICAP's Parameta Solutions in Singapore—integrating, normalizing, and distributing OTC data feeds from exchanges and vendors using tools like Refinitiv RTDS, cloud platforms, and scripting languages.

Hewlett Packard Enterprise

Open 128d North AmericaSenior Ireland permit employer

Senior Physical Design Engineer

Bash Cloud Linux Perl Python +3 skills

Designs and implements large SoC physical layouts from RTL to GDSII, including floorplanning, place & route, power grids, and sign-off verification for high-performance chips.

174K – 353K $

Hewlett Packard Enterprise

Open 128d North AmericaPrincipal Ireland permit employer

Principal Physical Design Engineer

Automation Bash Cloud Git Linux +4 skills

This role involves developing and maintaining ASIC physical design flows and automation using tools like Cadence Innovus and Synopsys Fusion Compiler. The engineer will partner with design teams to ensure high-quality silicon implementation through floorplanning, timing closure, and signoff.

174K – 353K $

Analog Devices

Open 63d North AmericaInternshipIntern Licensed UK sponsor H-1B sponsor history

Associate Digital Design Engineer

AI Automation Bash Perl Python +3 skills

Design, implement, and verify digital integrated circuits and subsystems using RTL (Verilog/SystemVerilog) in a cross-functional semiconductor engineering team at Analog Devices in San Jose.

86K – 118K $

Advanced Micro Devices, Inc

RTL Design & Integration Engineer

Open 63d North America

AI Automation Bash Cadence Virtuoso FPGA +7 skills

RTL design and integration engineer on AMD's FPGA product team, driving silicon implementation using Verilog/SystemVerilog, EDA tools, and scripting automation.

Advanced Micro Devices, Inc

Senior Physical Design Engineer - Server SoC & Chiplet Implementation

Open 64d APACSenior

AI Linux Perl Python Tcl +1 skills

The Senior Physical Design Engineer will plan, build, and execute physical design for complex chiplets in server SoCs using advanced technology nodes. The role involves driving design implementation from concept to tape-out, performing synthesis and place-and-route, and collaborating with cross-functional teams.

SimVentions, Inc

Open 62d RemoteNorth AmericaFellowship

Red Team Penetration Tester **

Active Directory API Authentication Automation AWS +37 skills

Red Team Penetration Tester conducting offensive cybersecurity operations and penetration testing for U.S. Government/DoD systems using tools like Kali, Metasploit, Cobalt Strike, and NMAP.

110K – 150K $

Distance Technologies

Agentic AI AI Automation Embedded Software Ethernet +9 skills

(Senior) FPGA Engineer

Open 62d EuropeSenior

Finland

Designs real-time FPGA-based image processing hardware for AR/HUD systems in defense and automotive, bridging sensor data and computational optics with strict latency constraints.

Microsoft

Open 53d On-siteNorth AmericaFull-time

Quantum Systems Digital Design Engineer II

Agentic AI AI Aurora Azure Azure DevOps +23 skills

Overview Microsoft is the world’s center of expertise on topological quantum computing. We are building a scaled, fault‑tolerant quantum computer grounded in topological qubits and integrated end‑to‑end with the Azure…

Intel

Open 64d APAC Ireland permit employer

CPU Physical Design Engineer

Automation Perl Python Tcl Verilog +1 skills

CPU Physical Design Engineer performing full physical design implementation from RTL to GDSII—synthesis, placement, routing, clock tree synthesis, timing/power analysis, and signoff—using Synopsys and Cadence EDA tools on high-performance Intel CPUs.

NXP Semiconductors

Open 64d APACPrincipal Licensed NL sponsor

Principal Digital Design Engineer

Asic Firmware FPGA Perl Python +6 skills

An experienced Digital Design Engineer is responsible for designing, developing, and optimizing digital logic circuits and systems for semiconductor, FPGA, or ASIC-based products. The role involves working across the…

ARM

Open 64d HybridAPACSenior Ireland permit employer

Senior Design Engineer : Custom Digital Hard Macros (Physical IP)

Accessibility AI Automation GPU Python +4 skills

Role Overview The Arm Solutions Engineering Physical IP group is building a team focused on the development of custom and semi-custom digital hard macros used across Arm CPU, GPU, NPU, and SoC products. These hard…

Analog Devices

Open 64d North AmericaInternshipIntern Licensed UK sponsor H-1B sponsor history

Associate Digital Design Engineer

AI Automation Bash Perl Python +3 skills

Design and verify digital integrated circuits using Verilog/SystemVerilog, collaborating with cross-functional teams to implement and optimize semiconductor solutions.

АО ЦКБА

CMake C++ FreeRTOS Git Linux +6 skills

Ведущий инженер-программист

Open 63d CISLead

Russia

Обязанности: Разработка, тестирование, отладка и сопровождение в производстве блоков обработки радиолокационной информации. Требования: Опыт работы от 3 лет (контроллеры, разработка ПО для встраиваемых систем и систем…

Apple

Standard Cell Design Methodology & Flow Engineer

Open 127d North America

Automation CAD Machine Learning Perl Python +4 skills

Design and optimize standard cell libraries and flows for Apple’s custom processors using Verilog/SystemVerilog, EDA tools, and ML-driven analysis to improve timing, power, and area.

Apple

Circuit Design Engineer - Library

Open 127d North America

Do you want to utilize your engineering background to make big things happen? Can you influence, connect, get results and communicate effectively? Can you deliver on a predictable and dynamic schedule? Do you have a…

GPU Perl Tcl

Ramaxel

芯片模拟版图工程师

APAC

China

1、负责芯片模拟电路设计流程中的 EDA 前后端工具环境搭建、配置与维护，确保设计工具链稳定运行； 2、熟悉analog/custom cell k 库流程，熟悉相关主流EDA(liberate/primelib)等工具； 3、开发和优化芯片设计自动化脚本，提升设计流程效率和规范性； 4、参与芯片设计流程的标准化制定，编写工具使用指南、流程文档及故障排查手册，为模拟设计团队提供技术支持； 5、跟踪 EDA…

Bash Linux Python Tcl

Ramaxel

芯片模拟CAD工程师

APAC

China

1、负责芯片模拟电路设计流程中的 EDA 前后端工具环境搭建、配置与维护，确保设计工具链稳定运行； 2、熟悉analog/custom cell k 库流程，熟悉相关主流EDA(liberate/primelib)等工具； 3、开发和优化芯片设计自动化脚本，提升设计流程效率和规范性； 4、参与芯片设计流程的标准化制定，编写工具使用指南、流程文档及故障排查手册，为模拟设计团队提供技术支持； 5、跟踪 EDA…

Bash Linux Python Tcl

Infineon