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Staff Digital Design Engineer
Lead digital design for power-management ICs, defining architecture, RTL, synthesis, and timing while collaborating with global teams to deliver high-efficiency converters for consumer, industrial, and automotive applications.
Staff Digital Design Engineer
* Description for Internal Candidates Responsibilities : OnSemi is seeking a Prin Digital design engineer, NEW PRODUCT DEVELOPMENT, Power Management, to join our growing team in Bengaluru, India. This group is…
ASIC Design Manager
Lead a team to design and integrate ASIC/SOC components, focusing on power and clock management, while collaborating with cross-functional hardware and software teams.
ASIC Design Engineer — IP Integration & Implementation
Designs and integrates high-performance, low-power pixel processing engines for Apple’s SoCs, writing RTL and collaborating with verification and physical design teams.
AI Automation Design Packaging Lead
Lead AI-driven automation for advanced semiconductor packaging, building workflows that optimize substrate, interposer, and bridge interconnect designs using EDA tools and ML frameworks.
Silicon Validation Manager
Kandou is a semiconductor company pioneering high-performance interconnect and chip-to-chip communication solutions. Our engineering teams push the boundaries of what is possible in silicon design, validation, and…
Physical Design Engineers - 2 openings
At Kandou , we are redefining the economics of AI infrastructure. Our mission is to democratise AI by significantly reducing the Total Cost of Ownership (TCO) of hardware systems — a critical barrier to scalable…
Manager
We are looking for your experience and your willingness to use it to achieve cross-project success. Moreover, as a technical lead you are able to plan and track work packages, delegate tasks and manage relationships to…
DFX RTL Design Engineer
DFX RTL design engineer on AMD's Client SOC DFX team, planning and implementing DFX features (JTAG, Scan, Boundary Scan, Debug) and low-power UPF support for next-gen microprocessors using Verilog/SystemVerilog/VHDL and scripting languages.
Market Data Engineer
Builds and maintains real-time financial market data pipelines, ensuring accuracy, low-latency distribution, and integration with exchanges/vendors. Core tech: FIX/TREP protocols, cloud (AWS/GCP), scripting (Python/Bash), and network optimization.
Semiconductor Design Engineer
The Semiconductor Design Engineer designs and analyzes digital and analog circuits for memory products, managing layout, verification, and simulation processes. The role involves collaborating with cross-functional teams to optimize manufacturing and ensure product quality using tools like Cadence Virtuoso, SPICE, and various hardware description languages.
NVIDIA 2027 Internships: Hardware Verification
NVIDIA is seeking interns for a 12-week hardware verification program to work on projects involving GPU and processor architecture, functional testing, and digital design. Interns will utilize tools like SystemVerilog, UVM, and various simulation environments to support hardware validation efforts.