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Analog Devices
11 views 3 months ago

Staff Design Verification Engineer – SoC and eFPGA

Open 80d North AmericaFull-timeStaff Licensed UK sponsor — This employer appears on the GOV.UK register of licensed sponsors for the Skilled Worker and related work routes. The licence belongs to the employer and is not a commitment to sponsor this role.H-1B sponsor history — This employer has had H-1B petitions approved by USCIS in the last five fiscal years, per the USCIS H-1B Employer Data Hub. The approval belongs to the employer and is not a commitment to sponsor this role.
United States

Design and run verification environments for next-gen eFPGA and SoC IP using UVM, SystemVerilog, and assertions to ensure silicon tape-out quality.

AI Automation CI/CD C++ Firmware +5 skills
151K – 219K $
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KLA
3 views 3 months ago

Lead FPGA Engineer

Open 80d North AmericaLead
United States

Lead the design, testing, and integration of FPGA firmware for high-performance imaging systems, collaborating with hardware and software teams to meet manufacturing requirements.

Firmware FPGA MATLAB PCIe Python +5 skills
118K – 200K $
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Advanced Micro Devices, Inc
7 views 3 months ago

Lead Design Verification Engineer

Open 81d APACLead
India

Design and implement verification environments for AMD’s Network-on-Chip IPs and SoCs using SystemVerilog/UVM, formal tools, and coverage-driven flows to ensure functional correctness.

AI Automation Cloud Db2 FPGA +6 skills
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bitdeer
7 views 3 months ago

Senior/Staff Front-End Engineer (RISC Processor Integration)

Open 122d APACStaff
Singapore

Integrate RISC processors (RISC-V/Arm) into SoC platforms, configure subsystems, and collaborate on RTL, firmware, and system bring-up for Bitdeer’s Bitcoin mining and AI cloud hardware.

AI Cloud Firmware FPGA HPC +4 skills
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Rambus
4 views 3 months ago

SMTS Software Development

Open 81d EuropeFull-timeSenior H-1B sponsor history — This employer has had H-1B petitions approved by USCIS in the last five fiscal years, per the USCIS H-1B Employer Data Hub. The approval belongs to the employer and is not a commitment to sponsor this role.
Netherlands

Builds and maintains EDA tools and automation for chip design flows using Python, Tcl, Perl, and SystemVerilog to speed up verification and synthesis.

AI Automation Bash OOP Perl +4 skills
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ByteDance
1 views 3 months ago

ASIC Design Engineer Graduate (Video Silicon IP) - 2027 Start

North AmericaJunior
United States

About the team Our team is building industry-leading, highly efficient, and scalable video codec hardware solutions (FPGA and ASIC) from the ground up to better serve our billions of users. We are looking for strong…

Asic Automation Firmware FPGA Python +3 skills
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NVIDIA Backed by SequoiaBacked by SoftBank Vision Fund
5 views 3 months ago

Senior FC Verification & Simulation Infrastructure Engineer

Open 81d MENASenior
Israel

Build and optimize simulation infrastructure for NVIDIA’s next-gen networking silicon, accelerating full-chip verification with SystemVerilog/UVM, Python, C/C++, and AI tools.

AI Automation C++ Firmware Networking +3 skills
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Johnson & Johnson
9 views 3 months ago

Logic Designer and FPGA Tech Lead

Open 81d MENALead H-1B sponsor history — This employer has had H-1B petitions approved by USCIS in the last five fiscal years, per the USCIS H-1B Employer Data Hub. The approval belongs to the employer and is not a commitment to sponsor this role.
Israel

Lead FPGA architecture and RTL development for real-time medical systems, guiding Verilog/SystemVerilog implementations, timing closure, and hardware bring-up in a regulated healthcare environment.

Automation Design Thinking FPGA I2c JTAG +10 skills
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Qualcomm
4 views 3 months ago

SOC Architect / uArchitect

Open 27d On-siteAPAC H-1B sponsor history — This employer has had H-1B petitions approved by USCIS in the last five fiscal years, per the USCIS H-1B Employer Data Hub. The approval belongs to the employer and is not a commitment to sponsor this role.
India

Company: Qualcomm India Private Limited Job Area: Engineering Group, Engineering Group > Systems Engineering General Summary: Skills/Experience: Bachelor’s Degree required, Master or PhD degree in related field highly…

Asic C++ FPGA IoT PCIe +8 skills
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Silimate Backed by Y Combinator
13 views 3 months ago

Chip/Software Engineer

Open 82d On-siteNorth America
United States

Builds AI-native EDA tools and agent-driven workflows for chip design, writing Python/C++ code for Fortune enterprises and chip unicorns while translating user feedback into product updates.

AI C++ Machine Learning Python Statistics +1 skills
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Mavensecuritiesholdingltd
9 views 3 months ago

Senior FPGA Design Engineer / Hardware Engineer

Open 82d UKSenior
United Kingdom

Design and optimize FPGA systems to reduce latency and boost throughput for a proprietary trading firm, using SystemVerilog and automated verification.

FPGA Maven Python SystemVerilog Tcl
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AST SpaceMobile
10 views 3 months ago

Senior FPGA Team Lead

Open 82d EuropeLead Licensed UK sponsor — This employer appears on the GOV.UK register of licensed sponsors for the Skilled Worker and related work routes. The licence belongs to the employer and is not a commitment to sponsor this role.
Latvia

Lead a team to architect and implement FPGA-based signal processing systems for a space-based cellular broadband network, using VHDL/Verilog and Xilinx tools.

FPGA MATLAB Python SerDes Signal Integrity +4 skills
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OQ Technology
12 views 3 months ago

FPGA Engineer

Open 53d Europe
Luxembourg

With our groundbreaking satellite 5G constellation, OQ Technology is a global leader in IoT communication connectivity and associated services. We are a venture capital-backed company with a successful track record of…

Acceptance Criteria Automation Bash C++ Embedded Linux +21 skills
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Rambus
8 views 3 months ago

HW Security Engineer

Open 82d EuropeFull-time H-1B sponsor history — This employer has had H-1B petitions approved by USCIS in the last five fiscal years, per the USCIS H-1B Employer Data Hub. The approval belongs to the employer and is not a commitment to sponsor this role.
Netherlands

Design and develop secure hardware IPs like post-quantum crypto accelerators and random number generators using Verilog/VHDL and ASIC flows.

AI Asic Bash Linux Perl +6 skills
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Apple Backed by Sequoia
4 views 3 months ago

ASIC Design and Integration Engineer – Silicon Security

Open 83d North America
United States

Design and integrate secure ASIC subsystems to protect Apple’s SoCs from side-channel attacks and ensure data integrity using RTL, UPF, and cryptographic engines.

AI Asic Cryptography Rtl SystemVerilog +1 skills
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Apple Backed by Sequoia
3 views 3 months ago

ASIC Design and Integration Engineer – Silicon Security

Open 83d North America
United States

Designs and integrates secure ASIC subsystems to protect Apple’s SoCs from side-channel attacks and ensure data integrity using RTL, cryptographic engines, and hardware defenses.

AI Asic Cryptography Rtl SystemVerilog +1 skills
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Cisco Backed by Sequoia
15 views 3 months ago

ASIC Design Verification Engineering Leader

Open 129d North AmericaFull-time Licensed NL sponsor — This employer appears on the IND public register of recognised sponsors for work and highly skilled migrants. The recognition belongs to the employer and is not a commitment to sponsor this role.
United States

Lead verification of Cisco’s cutting-edge data-center ASICs, building DV environments, writing test plans, and ensuring full coverage with Verilog/SystemVerilog/UVM while collaborating with designers and software teams.

Agentic AI AI Asic Cisco Cloud +13 skills
214K – 310K $
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SiFive
11 views 3 months ago

Staff Design Verification Engineer – High Performance CPU Core

Open 82d North AmericaStaff
United States

Staff Design Verification Engineer to verify high-performance CPU cores (frontend, midcore, load-store, prefetch) using SystemVerilog/UVM, debug microarchitectural issues, and drive coverage closure for next-gen RISC-V processors.

Automation C++ Machine Learning Python SystemVerilog +1 skills
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SiFive
16 views 3 months ago

Senior Design Verification Engineer – High Performance CPU Core

Open 82d North AmericaSenior
United States

Own verification of high-performance CPU cores using SystemVerilog/UVM, writing test plans, assertions, and coverage to catch corner-case bugs in out-of-order pipelines.

Automation Machine Learning SystemVerilog Uvm
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SiFive
8 views 3 months ago

Staff Design Verification Engineer – Cache Verification

Open 82d APACStaff
Taiwan

Staff engineer verifying CPU cache and memory-subsystem designs using SystemVerilog/UVM, focusing on cache coherency, ordering, and corner-case bugs.

Automation C++ FPGA Machine Learning Python +2 skills
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