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Develops and maintains embedded flight software in C/C++ for a hypersonic reentry vehicle, integrating hardware and real-time control systems for aerospace missions.
Designs and validates high-speed interconnects for Meta’s data-center hardware, ensuring reliable signal integrity across AI, networking, and storage platforms.
FAST Lab – Senior FPGA Engineer Location: Merrimack, New Hampshire, United States Category: Engineering & Technology Employment Type: Full-Time Job Description Be a part of something bigger. At BAE Systems’ FAST…
FAST Lab – Entry Level FPGA Engineer Location: Merrimack, New Hampshire, United States Category: Engineering & Technology Employment Type: Full-Time Job Description Be a part of something bigger. At BAE Systems’…
Designs and develops analog and memory-based computing-in-memory (CIM) chips for AI inference acceleration, owning the full flow from architecture to post-silicon validation.
Senior Hardware Design Engineer Location: Atlanta Time Type: Full time Job Description As the global leader in high-speed connectivity, Ciena is committed to a people-first approach. Our teams enjoy a culture focused…
Hardware engineer in Bristol validates and debugs AI system memory interfaces (LPDDR5-9600), signal integrity, and board bring-up using lab tools like oscilloscopes and BERT systems.
Validates cutting-edge AI chips by testing silicon, debugging hardware/software issues, and improving validation processes using C/C++, Python, and Linux.
Principal Embedded Software/Firmware Engineer validates and brings up cutting-edge AI chips, writing bare-metal C/C++ tests and automating validation in Python on FPGA/emulator and first silicon.
Designs and integrates high-performance AI accelerator SoCs, collaborating with hardware, software, and verification teams to deliver cutting-edge silicon for AI compute.
Designs and optimizes the physical layout of AI chips using advanced EDA tools and flows, ensuring high-performance and power-efficient designs for next-gen AI superchips.
Staff Embedded Software/Firmware Engineer at Graphcore in Bengaluru, responsible for validating and bringing up new AI chips using C/C++ and Python, collaborating with cross-functional teams to debug and optimize silicon performance.
Designs and maintains UEFI firmware for AI server platforms, ensuring platform initialization, hardware configuration, and reliability in hyperscale data centers.
Leads post-silicon debug and validation for next-gen AI compute silicon and systems, collaborating across hardware, firmware, and software teams to resolve complex issues and improve validation processes.
Debug Validation Engineer at Graphcore in Bengaluru debugs and validates next-generation AI compute silicon and systems, using Python, C, and hardware debug tools to isolate complex issues across hardware, firmware, and software.
Debug Validation Engineer at Graphcore debugs and validates next-generation AI compute silicon and systems, using Python, C, and hardware debug tools to isolate complex hardware/firmware issues in a Linux environment.
Leads silicon bring-up and validation for cutting-edge AI chips, writing bare-metal C/C++ tests, debugging first silicon, and collaborating with cross-functional teams to ensure high-performance hardware works flawlessly.
Defines and executes validation plans for complex electronic systems, performing hands-on testing with lab equipment and collaborating with ODM partners to ensure hardware meets performance and reliability standards before production.
Debug and validate high-speed interfaces (SerDes, PCIe, Ethernet) for AI hardware in a lab setting, resolving issues across silicon, firmware, and architecture teams.
Designs and integrates complex System-on-Chip (SoC) architectures for next-gen AI acceleration platforms, working across hardware, software, and system teams to define critical subsystems.
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