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DDR Design Engineer
Are you passionate about microprocessor architecture? We need you! As a Senior Memory Design Engineer, you play a crucial role in designing and developing memory subsystem solutions for our semiconductor portfolio. You…
FPGA Silicon Design Verification Engineer
Design Verification Engineer builds UVM testbenches and runs pre-silicon verification for FPGA DFT logic like scan, MBIST, and JTAG to ensure silicon quality before tape-out.
Physical Design STA Engineer
Design and optimize physical design, STA, and power integrity flows for high-speed networking chips and SoCs using tools like PrimeTime and PrimePower.
Physical Design Engineer
Designs and optimizes semiconductor physical layouts for FPGAs, guiding RTL through GDSII with timing, power, and verification signoff.
Entwicklungsingenieur FPGA (all genders)
Safety Beyond – Join the team behind the world’s safest vision systems! Bei Kappa optronics dreht sich alles um High-Tech mit echtem Impact. Unsere Vision Systeme gehören weltweit zur Spitze in Defense, Aviation und…
Senior Design Engineer
As a Senior Design Engineer, you will be responsible for all aspects of front-end ASIC design, including RTL implementation and verification of complex logic blocks. You will collaborate with PD, DFT, STA, and…
Physical Design Engineer (Staff / Sr. Staff / Principal)
Drive physical implementation and sign-off of critical blocks for next-generation AI and high-performance computing silicon, owning complex designs from RTL to GDSII across synthesis, floorplanning, place and route,…
Senior DevOps Developer (PDSW scrum) [585]
Build and run hybrid-cloud and on-premises infrastructure for quantum computing services, automating CI/CD pipelines and monitoring high-performance systems.
数字后端设计工程师
1、全流程物理实现：负责数字芯片从网表到最终版图交付的完整物理设计全流程，保障芯片项目顺利流片。 2、AI与自动化开发：借助 Claude Code、Codex 等 AI 辅助编码工具，开发并持续迭代芯片后端设计自动化工作流。负责沉淀相关AI command、skill、mcp、sub-agent，提升团队研发效率。…
Инженер-программист С/С++
Задачи: развитие и поддержка ядра программной платформы для создания программного обеспечения контрольно-проверочной аппаратуры (ПО КПА) для испытаний бортовых приборов космических аппаратов разработка и поддержка…
Manager / Senior Manager – Design Verification
Lead a team to verify low-power wireless SoC designs using SystemVerilog/UVM, ensuring robust IP and chip-level functionality across global projects.
Emulation Front-End Infrastructure Engineer
Engineer scalable compilation and synthesis flows for NVIDIA’s hardware emulation platforms, using EDA tools like Synopsys and Cadence to validate complex chip designs before fabrication.
PCIe Digital Design, Sr Staff Engineer-18307
We Are Synopsys is the leader in engineering solutions from silicon to systems, enabling customers to rapidly innovate AI-powered products. We deliver industry-leading silicon design, IP, simulation and analysis…