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Physical Design Engineer
Designs and optimizes advanced semiconductor IP and SoCs from RTL to GDSII, focusing on timing closure, power reduction, and physical verification for next-gen FPGAs.
Senior Physical Design Engineer
Senior engineer who implements custom IP and SoC designs from RTL through GDSII, closing timing, optimizing power, and signing off on next-gen FPGA silicon using Synopsys/Cadence EDA tools.
Lead RTL Design Engineer
Lead the design of Cerebras' next-generation AI chips, focusing on high-performance RTL development and integration while collaborating with cross-functional teams and external ASIC vendors.
HRBP_PT
Position Summary: Work as plant HR BP on planning, execution and development. Provide professional HR consultancy and solutions to support business strategies, drive organizational development and a high-performance…
Concepteur Digital Design (H/F/N)
Designs digital SoC/ASIC IP blocks and subsystems for automotive electronics, writing RTL in Verilog/VHDL and guiding physical implementation and verification flows.
[Japan] Field Applications Engineer (FAE)
Introduction EdgeCortix is hiring for a field application engineer position to join our Tokyo/Kanagawa based team and drive support of pre-sales and post-sales activities related to our artificial intelligence (AI)…
FPGA Engineer
Design and maintain FPGA firmware for aerospace systems, including SoC integration, signal processing, and space-grade communication interfaces.
Software Validation Engineer
Job Details: Job Description: Altera is seeking a motivated Software Validation Engineer to ensure the quality and reliability of our cutting-edge software solutions for programmable logic devices! Responsibilities:…
USB-Design Verification Senior Engineer
Company: Qualcomm India Private Limited Job Area: Engineering Group, Engineering Group > Hardware Engineering General Summary: As a leading technology innovator, Qualcomm pushes the boundaries of what's possible…

Hardware Systems Engineer - Board Design
Design and validate high-speed circuit boards and test systems for Apple’s next-gen SoCs, debugging power, signal integrity, and interface issues in the lab.

Design Engineer
The Apple design team is looking for an experienced engineer to develop multiple IPs for Apple SoCs (in Storage, Computer Vision and RISC-V CPU domains). In this Role you will get to handle micro-architecture…
Relationship Manager -Equipment Finance -Sales -Aurangabad - Kandi Towers -JM*
Relationship Manager - Sales REPORTS TO (SOLID & MATRIX): Position Grade: Business Unit: SME Department: Sales Sub Function: EQF Location: Number of Positions: Single / Multiple Position Type: Full Time Job Purpose…
Relationship Manager - Equipment Finance - Sales - Nashik - Metro 99 Commercial Complex - JM
Relationship Manager - Sales REPORTS TO (SOLID & MATRIX): Position Grade: Business Unit: SME Department: Sales Sub Function: EQF Location: Number of Positions: Single / Multiple Position Type: Full Time Job Purpose…
