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FPGA Compiler (Placer) Engineer
Develop and optimize FPGA placement algorithms to improve timing, power efficiency, and design quality within Altera’s compiler toolchain.
ASIC Design Engineer
Role Overview As a Senior ASIC Design Engineer, you will take a leadership role in defining, implementing, and delivering critical IP blocks and subsystems for Positron.ai’s inference ASICs/SoCs. You will own the…
Senior Design Verification Engineer
Leads digital IC verification for mixed-signal IP (DACs, ADCs, PLLs) in automotive/industrial/medical products, designing SystemVerilog/UVM environments, debugging RTL, and improving verification methodologies.
Senior Design Verification Engineer
We are looking to expand our team with a Senior Digital IC Verification Engineer . You will help us develop IP for next generation Automotive, Industrial & Medical products. The successful candidate will…
ASIC Design Verification Engineer
Role Overview As an ASIC Design Verification Engineer, you will play a critical role in ensuring the functional correctness and performance of our AI inference ASICs. You will be responsible for developing and…
Test Engineer II
AppLogic Networks powers the networks behind AI and the critical applications people rely on every day. We help network owners service providers and Enterprises understand how applications perform, how users experience…
Physical Design Engineer, Synthesis and Implementation
A Physical Design Engineer specializes in RTL-to-gate synthesis and physical implementation for high-speed communication chips, optimizing performance, power, and area while collaborating with cross-functional teams to resolve design bottlenecks and automate workflows using tools like Synopsys Fusion Compiler and Cadence Genus.
Integration Engineer
Designs and integrates hardware components into Apple’s next-gen SoC, writing and merging RTL code, managing IP blocks, and ensuring timing closure with industry-standard tools.
Silicon Design Engineer
Designs and implements advanced semiconductor testchips from RTL to GDSII tapeout, focusing on physical design, timing closure, and silicon validation for high-performance ASIC/FPGA solutions.
SoC设计工程师（AI芯片） - 芯片研发
团队介绍：字节芯片研发团队目前工作主要集中在芯片设计环节，主要围绕字节自身业务展开芯片探索，为字节多项业务的专用场景定制硬件优化，设计多款基于先进半导体工艺的云端复杂芯片，以期提升性能、降低成本。早期若干芯片项目已经进入到量产部署阶段，有多次一版成功的投片经历，所用工艺包含多个主流的先进工艺节点。与基础设施各团队之间工作的整体协同，能更容易和更好地发挥芯片研发的价值。…