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Designs and validates next-gen networking hardware (switches, routers) by running system-level tests, automating validation with Python/C++, and debugging ASICs and firmware in a hybrid San Jose office role.
Senior engineer enabling NVIDIA’s AI data-center servers by bringing up, validating, and debugging GPU racks and firmware stacks before mass deployment.
Validate and debug high-performance networking silicon in a lab, performing early-silicon bring-up, electrical measurements, and root-cause analysis for ASICs powering Cisco’s core Switching, Routing, and Wireless products.
Applications engineers for Sitara MPU serve as technical experts on TI’s Sitara family of Processors and its use cases. This function is organized by end equipment and sector to drive a deeper understanding of key…
Designs and optimizes firmware for HP’s commercial PCs, integrating sensors, thermal control, and system-level features while collaborating with hardware and software teams.
Senior Staff Engineer at Marvell validates high-speed SerDes IP for AI, cloud, and networking, performing silicon bring-up, electrical characterization, and system-level testing with cutting-edge analog and digital validation tools.
Designs and implements ultra-high-speed Ethernet test platforms using cutting-edge FPGAs, focusing on Layer 1–4 protocols and next-gen standards like 1.6Tbps Ethernet.
Develops and maintains firmware for embedded controllers in client devices, integrating with platform firmware, supporting hardware teams, and collaborating with vendors/OEMs to ensure compatibility with NVIDIA products. Core technologies include ARM architecture, C/C++, low-level interfaces (GPIO/I2C/SPI/PCIe), and embedded Linux.
Build and validate NVIDIA’s next-gen AI server platforms, debugging GPU racks, firmware, and low-level interfaces to ensure flawless deployment in data centers.
Lead validation strategy for enterprise SSD firmware, architecting AI/ML-powered test frameworks and verifying NVMe features across hardware environments.
Architect and develop firmware for PC platforms, collaborating with hardware teams to optimize BIOS/UEFI, power management, and low-level hardware interactions.
Design and develop firmware for PC platforms, focusing on thermal control, sensor integration, and system-level enablement using C/C++ and UEFI/BIOS.
Design and automate test solutions for analog, mixed-signal, and digital ICs on ATE platforms using C/C++, Python, and Java to meet cost, quality, and time-to-market goals.
Principal Engineer validating next-gen data-center ASICs/SoCs from first-silicon bring-up through system-level qualification, using lab tools and scripting to ensure performance, reliability, and compliance with specs.
Lead hardware emulation and FPGA prototyping for semiconductor customers, designing advanced verification solutions for high-speed protocols like PCIe and CXL.
Architect and lead the Android platform for HP, designing low-level drivers, kernel components, and AI-driven features while guiding cross-functional teams to deliver robust embedded solutions.
Designs and verifies ASIC/FPGA digital architectures and RTL code for defense systems, integrating and testing FPGA modules in a lab using industry-standard tools.
Note: This position is posted for Markham, but it is open to candidates across Canada, including Mississauga, Nepean, and Ottawa. The role can be hybrid or fully remote depending on your location and preference. We Are…
Design and test ruggedized avionics hardware for aircraft, including high-speed circuit boards, EMI control, and thermal management, while collaborating with cross-functional teams.
At SK Hynix Memory Solution, we're at the forefront of semiconductor innovation, developing advanced memory solutions that power everything from smartphones to data centers. As a global leader in DRAM and NAND…
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