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Senior Circuit Design Engineer - Noise
Designs and optimizes digital, mixed-signal, and analog circuits for NVIDIA's next-gen processors, focusing on noise mitigation and performance using deep submicron technologies.
Intern: Software Engineering Jasper R&D
Intern in Belo Horizonte contributes to Cadence’s Jasper formal verification tools by fixing bugs, adding features, and writing C++, Python, and Tcl under Linux while learning EDA software development.
Custom Circuit Design (Sr. Staff / Principal)
Role Overview As a Sr. Staff/Principal Custom Circuit Design Engineer at Velaura AI, you will lead the architecture, design, and optimization of high-performance, low-power standard cell libraries and custom digital…
DFT Engineer (Architect / Manager / Sr. Manager)
Role Overview As a DFT Architect/Manager/Sr. Manager at Velaura AI, you will lead the definition, implementation, and execution of Design-for-Test strategies for next-generation AI and high-performance computing…
Physical Design Engineer (Staff / Sr. Staff / Principal)
Role Overview As a Staff/Sr. Staff/Principal Physical Design Engineer at Velaura AI, you will be responsible for driving the physical implementation and sign-off of critical blocks for next-generation AI and…
Digital Design SME
Peraton Overview Peraton is a next-generation national security company that drives missions of consequence spanning the globe and extending to the farthest reaches of the galaxy. As the world’s leading mission…

Physical Design Engineer - Flow & Methodologies
Designs and automates the RTL-to-GDSII physical design flow for AI inference hardware, optimizing power, performance, and area while ensuring signoff compliance.

Physical Design Engineer - Block Level, Subsystem Implementation
Designs and optimizes AI hardware blocks from synthesis to GDSII sign-off, focusing on PPA and timing closure for advanced process nodes in a fast-paced startup.


Senior ASIC Physical Design Engineer, Netlisting
NVIDIA has continuously reinvented itself over two decades. Our invention of the GPU in 1999 sparked the growth of the PC gaming market, redefined modern computer graphics, and revolutionized parallel computing. More…
FPGA Verification Engineer Level 5 - Linthicum
RELOCATION ASSISTANCE: Relocation assistance may be available CLEARANCE REQUIRED FOR START: No CLEARANCE TYPE: None TRAVEL: Yes, 10% of the Time Description At Northrop Grumman, our employees have incredible…
FPGA Verification Engineer Level 3/4 - Linthicum
RELOCATION ASSISTANCE: Relocation assistance may be available CLEARANCE REQUIRED FOR START: No CLEARANCE TYPE: None TRAVEL: Yes, 10% of the Time Description At Northrop Grumman, our employees have incredible…
ASIC Physical Design Engineer - Power, Senior
Principal ASIC engineer defining and optimizing power architecture for AI inference accelerators, using low-power design techniques and tools like PrimePower and Joules.
Memory Compiler Support and Development Lead
WHAT YOU DO AT AMD CHANGES EVERYTHING At AMD, our mission is to build great products that accelerate next-generation computing experiences—from AI and data centers, to PCs, gaming and embedded systems. Grounded in a…
Physical Design Senior Engineer
Senior engineer responsible for RTL-to-GDSII physical design of complex digital blocks, including high-speed interfaces and automotive modules, using advanced EDA tools and timing closure techniques.