Point your AI agent at freehire and let it find you a job. A CLI and an MCP server over the whole job API — no browser.
Designs and optimizes advanced IC packages for custom ASICs and RFICs used in SpaceX's Starlink satellites and ground systems, focusing on signal/power integrity and RF performance.
Design advanced IC packages for custom ASICs and RFICs used in SpaceX's Starlink satellites and ground systems, optimizing signal/power integrity and RF performance.
Designs and implements high-performance ASICs in Verilog/SystemVerilog for SpaceX’s Starlink network, collaborating with cross-functional teams to deliver space-grade silicon for global connectivity.
Designs and implements high-performance ASICs in Verilog/SystemVerilog for SpaceX’s Starlink network, collaborating with cross-functional teams to deliver space-grade chips that enable global broadband connectivity.
Designs and optimizes advanced ASIC/SOC chips for SpaceX's Starlink satellites and ground systems, focusing on physical implementation, timing closure, and verification using EDA tools.
Designs and implements advanced ASIC/SOC chips for SpaceX’s Starlink network, focusing on physical design flows, timing closure, and signoff checks to enable global satellite internet connectivity.
Designs, develops, and tests flight software for SpaceX's Starship spacecraft and Super Heavy rocket, working across application, OS, networking, and simulation layers to enable autonomous control and mission success.
Designs and implements software and firmware for next-gen avionics systems at SpaceX, ensuring reliable and safe launches while troubleshooting flight hardware/software.
Designs and implements satellite-based 4G/5G wireless firmware for Starlink Mobile, focusing on physical layer algorithms and high-performance C/C++ software for satellites and ground stations.
Develops and optimizes wireless firmware for Starlink’s satellite-based 4G/5G systems, focusing on signal processing and PHY/MAC layers while debugging performance issues.
Senior Network Engineer at SpaceX builds and secures the Starshield service provider network for national security missions, focusing on high-reliability mesh networks, datacenter deployments, and performance optimization.
Designs, scales, and automates high-performance computing infrastructure for SpaceX's Starlink silicon engineering, enabling faster chip design iterations and simulations.
Designs and builds test, automation, and firmware software in Python/C to validate and produce rocket components like valves and avionics for SpaceX’s Starship and Falcon vehicles.
Designs and verifies next-generation ASICs for SpaceX’s Starlink network, using SystemVerilog, UVM, and Python to ensure reliable satellite and ground infrastructure connectivity.
Design Verification Engineer at SpaceX developing and testing next-generation ASICs for Starlink's satellite and ground infrastructure using SystemVerilog, UVM, and Python.
Designs and integrates RF and analog integrated circuits for space-grade hardware, focusing on layout, parasitic minimization, and tape-out for national security projects.
Designs and verifies next-generation ASICs for SpaceX’s Starlink network, ensuring satellite and ground infrastructure connectivity through pre- and post-silicon validation.
Designs and verifies next-generation ASICs for SpaceX’s Starlink network, ensuring chips meet performance and reliability needs for global satellite and ground infrastructure.
Designs and integrates RF and analog layouts for advanced satellite and national security ICs, using EDA tools and scripting to meet space-grade requirements.
Designs and maintains wireless software for Starlink’s satellite internet system, including firmware, signal processing, and networking algorithms on custom hardware.
We couldn't check your fit for this role — add a CV to your profile to see it next time.