Hardware Jobs in Israel
There are 188 open Hardware jobs in Israel on freehire right now. 22 of them were posted recently. The skills employers ask for most often are networking, ai and verilog.
Most requested skills
- networking 39%
- ai 36%
- verilog 27%
- python 22%
- automation 20%
- ethernet 16%
- cloud 16%
- pcie 13%
How the work is done
- Onsite 70 · 37%
- Hybrid 14 · 7%
Visa sponsorship offered in 93% of the 15 postings that state a position on it.
Seniority
- Senior 80
- Junior 6
- Lead 6
- Principal 6
- Staff 4
- C-level 2
Who is hiring
- 1000+ employees 60
- 501-1000 employees 9
- 11-50 employees 1
Physical Design Engineer
Designs and optimizes custom silicon solutions for Google’s hardware, focusing on physical design methodologies, timing/power closure, and SoC partitioning to enhance performance and efficiency in AI and infrastructure products.
FPGA Design Engineer
FPGA Design Engineer owning the design and implementation of FPGA-based interfaces (PCIe, I2C, SPI, high-speed GT) on Xilinx UltraScale+ and Versal platforms for quantum computing control systems.
Senior FPGA Engineer
DRW is a diversified trading firm with over 3 decades of experience bringing sophisticated technology and exceptional people together to operate in markets around the world. We value autonomy and the ability to quickly…
Hardware Integration Engineer
Evaluates and integrates new hardware/firmware components for Infinidat’s enterprise storage platforms, debugging complex issues and supporting cross-functional teams in R&D, QA, and IT.
Hardware/Silicon Engineering PhD Intern, 2027
A PhD internship at Google Cloud and AI Infrastructure in Israel, focusing on co-designing hardware (CPUs, TPUs, SoCs) and software stacks to advance AI and cloud systems. Daily work spans algorithmic innovation, system architecture, hardware design, and performance optimization for Google’s custom silicon.
Senior Hardware Engineer
Design next-gen autonomous-driving hardware, from schematics and simulations to lab testing and mass production, collaborating with system, software, and safety teams.
DFT Design Engineer
Design and implement testability features (SCAN, MBIST, BSCAN) for Intel’s WiFi/BT chips, ensuring high test coverage and manufacturability.
Senior Hardware Engineer
Own PCB development from architecture to production for advanced drone controllers, including schematic design, layout, bring-up, and debugging while collaborating with cross-functional teams.
Senior Chip Design Dynamic Verification Engineer
Design and verify next-gen high-speed Switch Silicon chips for networking, focusing on power, area, and performance while collaborating with architecture and firmware teams.
Senior Signal Integrity Engineer-AV Hardware
Senior engineer running signal and power integrity simulations for high-speed interfaces in autonomous-vehicle hardware, using tools like HyperLynx and ANSYS.
Chip Design Engineer
Design and verify high-speed networking silicon chips, ensuring low latency and high throughput for NVIDIA's communication devices.
Senior Analog Hardware Engineer
Lead a team designing analog and communication circuits for solar inverters and optimizers, guiding designs from concept to mass production with lab verification and cross-team collaboration.
Senior PCB Layout Engineer
Design high-speed, high-density PCBs for NVIDIA networking hardware using Cadence Allegro, ensuring signal integrity and manufacturability for data-center solutions.
Physical Design Engineer
Designs and optimizes high-end custom silicon for AWS, focusing on physical design (RTL2GDS) and EDA tools to improve power, area, and performance of chips like Trainium and Graviton.
ASIC Design Verification Technical Lead, High-Speed DSP
Lead verification of high-speed DSP pipelines for Google’s TPU AI accelerators, ensuring pre-silicon models match physical silicon behavior using SystemVerilog/UVM and emulation.
Principal Engineer, Project Management - Chip Design
Lead the full lifecycle of NVIDIA’s next-gen switch ASICs, coordinating RTL design, verification, physical design, and post-silicon bring-up with cross-functional teams.