Hardware Jobs in Israel

Chip Design Integration Lead

Open 22d MENALead

ai automation aws bash cloud +8 skills

Lead the end-to-end integration of high-performance networking SoCs for AWS Nitro, defining IP blocks, resolving CDC/RDC issues, and driving synthesis/timing closure with Verilog/SystemVerilog and scripting.

Exodigo

Hardware Team Lead

On-siteMENALead

Exodigo is the leading underground mapping solution for non-intrusive discovery. Our platforms combine multi-sensor fusion, 3D imaging, and AI technologies to create complete, accurate underground maps that enable…

ai altium assembly

Open 22d MENASenior H-1B sponsor history

Senior VLSI Design Engineer

Designs and optimizes high-speed VLSI chips, collaborating with architecture and verification teams to reduce power consumption and ensure quality.

Open 22d MENAStaff H-1B sponsor history

Senior Staff VLSI Design Engineer

Design and implement high-speed chip micro-architectures for advanced networking ASICs, optimizing power and collaborating with global teams.

Integralife

Analogue and Digital Hardware R&D Engineer

Open 22d MENAFull-time

Lead hardware design and verification for medical devices, owning analog/digital subsystems from architecture to production transfer under IEC 60601 standards.

Intel

FPGA Engineer

backbone fpga prototyping verilog

Design and verify FPGA-based prototypes for Intel’s IP blocks, integrating and debugging RTL designs to enable early hardware and software validation.

Intel

Hardware Emulation Engineer

Develop and maintain hardware emulation platforms for ASIC/SoC designs, integrating and debugging RTL in emulation environments to enable pre-silicon validation.

verilog

Eyesatop

Hardware Engineer

Open 23d MENASenior

ai embedded-software ethernet kicad

Senior hardware engineer to lead PCB design for advanced drone controllers, from architecture to production, collaborating with software and mechanical teams.

Hardware Compliance Engineer

A Senior Hardware Compliance Engineer ensures NVIDIA’s hardware meets regulatory standards (e.g., EMC, safety) by designing and executing tests, debugging EMI issues, and documenting results. Core work involves lab testing, vendor/customer site support, and cross-team collaboration to resolve non-compliance issues.

cad linux

ASIC Hardware Design Engineer

Designs and implements high-performance, low-power security engines and RISC-V processor modules in RTL using Verilog/System-Verilog for NVIDIA’s AI and cybersecurity products.

verilog

Chip Design and Verification Engineer

Designs and verifies next-gen high-speed switch silicon chips for NVIDIA’s networking unit, focusing on performance, power, and latency while collaborating with architecture and firmware teams.

Mechanical Hardware Design Engineer

cad ethernet networking tcp-ip

Designs and tests mechanical hardware for high-speed networking boards, including thermal solutions and sockets, using Orcad and collaborating with R&D and production teams.

Microsoft

Open 25d On-siteMENAPrincipal

Principal Silicon Design Verification Manager

ai automation git linux python +1 skills

Leads a silicon engineering team to design and verify complex security-focused subsystems for Windows client products, blending hands-on verification (SystemVerilog/UVM, Python) with team mentorship and AI-driven workflow improvements.

SolarEdge Technologies

ATE Hardware Engineer

Open 23d Worldwide

ai automation microcontrollers test-automation

Design and build automated test systems for solar inverters and energy-management hardware, including test fixtures and load boards, and write test automation software.

Chip Design Engineer

Open 26d MENA

Designs and verifies next-gen high-speed switch silicon chips for networking, collaborating with architecture and firmware teams to ensure low latency and high throughput.

hpc networking

Johnson & Johnson

Open 25d MENALead H-1B sponsor history

Logic Designer and FPGA Tech Lead

automation design-thinking fpga jtag pcie +5 skills

Lead FPGA architecture and RTL development for real-time medical systems, guiding Verilog/SystemVerilog implementations, timing closure, and hardware bring-up in a regulated healthcare environment.

Senior Hardware Engineer

Open 27d MENASenior

ai cloud fpga machine-learning networking

Designs and leads GPU networking hardware from concept to production, including PCB schematics, high-speed interconnects, and power delivery for AI and data-center systems.

Open 23d MENA H-1B sponsor history

Physical Design Engineer

agentic-ai ai automation machine-learning python +1 skills

Designs and optimizes digital ASIC layouts from netlist to GDSII using EDA tools like Synopsys ICC2 or Cadence Innovus, scripting in Python/TCL, and exploring AI-assisted flows for advanced process nodes (TSMC N5/N4P/N3).

Open 23d MENASenior H-1B sponsor history

Senior Physical Design Engineer

agentic-ai ai automation python tcl

Senior Physical Design Engineer at Qualcomm leading floorplanning, placement, and timing closure for high-speed digital blocks on advanced nodes (TSMC N5/N4P/N3) using Synopsys ICC2, Cadence Innovus, and AI-assisted EDA flows.

Google

Emulation Hardware Engineer, Google Cloud

Open 28d MENA