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Formal Verification Architect
Architect and lead formal verification strategies for complex ASIC designs, guiding teams to ensure silicon quality for next-gen processors and I/O technologies.
Lead Logic Design Engineer
Lead MTS Logic Design Location: Vught, UNAVAILABLE, NL Employment Type: OTHER Overview Rambus, a premier chip and silicon IP provider, is seeking to hire an exceptional Lead Member of Technical Staff Logic Design…
Hardware Security Engineer
Design and develop secure hardware IPs like post-quantum crypto accelerators and random number generators using Verilog/SystemVerilog, collaborating with architects and software teams to meet security and quality standards.
Design Validation Engineer
Validate high-bandwidth memory (HBM) designs through simulation, lab testing, and data analysis to ensure performance and reliability for AI/ML workloads.
Principal FPGA Engineer - Markets Technology
Senior FPGA engineer designing ultra-low-latency hardware accelerators for an exchange’s trading platform, setting standards and mentoring teams.
Principal FPGA Engineer - Markets Technology
Lead FPGA design and hardware acceleration for low-latency trading systems, defining architectures for market connectivity and protocol processing to optimize performance and deterministic behavior.
Senior / FPGA Firmware Engineer (Ref 26545a)
Designs and maintains FPGA firmware, RTL modules, and device drivers while optimizing performance and debugging hardware-software integration for signal-processing systems.
SOC Design Engineer
Designs and verifies digital logic for SoCs using VHDL/Verilog, ensuring low-power compliance and DFT readiness, with FPGA prototyping and silicon validation.
FPGA System Design Engineer
Design and optimize FPGA-based signal processing and embedded computing solutions for defense and aerospace, using RTL, DSP Builder, and embedded processors.
Senior Hardware (FPGA) Engineer
Design and implement high-performance FPGA logic for embedded machine-vision systems, including RTL coding, simulation, and vendor selection, while collaborating with hardware and software teams.
Principal Engineer - FPGA/ASIC Design
Principal Engineer designing and verifying FPGA/ASIC solutions for Rolls-Royce engine control systems using VHDL/Verilog and DO-254 standards.
Firmware Engineer II- Active Secret (Onsite)
Design and verify FPGA/SoC firmware in VHDL for aerospace/defense systems, including HDL circuits, test benches, and lab integration; requires active U.S. Secret clearance.
Firmware Engineer II- Active Secret (Onsite)
Design and verify FPGA/SoC firmware in VHDL, write test benches, and validate hardware in the lab for aerospace and defense systems.
Technical Lead - FPGA Design & Verification Engineer
Lead FPGA design and verification for Thales’ aerospace, defence, and cybersecurity systems, using VHDL, Modelsim, and DO-254 processes to develop and validate hardware solutions.
AI/ML Driven ASIC Design and Implementation Automation Engineer
Designs AI/ML-driven automation for ASIC chip development, improving power, performance, and area using GenAI, reinforcement learning, and graph neural networks.
Junior Digital Design Engineer
Designs and verifies digital integrated circuits for IoT and automotive using VHDL/Verilog, with a focus on signal processing and low-level embedded software.
Embedded Software Developer (Must be US Citizen)
Design and implement embedded firmware for radar systems, integrating hardware/software components and accelerating algorithm development using C/C++, Python, and Xilinx tools.
Senior Design Engineer, RTL
Be part of a team that pushes boundaries, developing custom silicon solutions that power the future of Google's direct-to-consumer products. You'll contribute to the innovation behind products loved by millions…
Senior Electrical / Hardware Engineer
Design FPGA-based replacements for obsolete avionics hardware and lead DMSMS mitigation while ensuring DO-254/DO-160 compliance for safety-critical defense systems.