美商艾科斯羅國際股份有限公司台灣分公司
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4 views 2 weeks ago
Senior SoC FPGA Digital Design and Verification Engineer
HybridAPACSenior
Taiwan
Zhubei City, Hsinchu CountyThe Role: High-Speed RTL and SoC Integration You will be responsible for RTL design, SoC integration, and high-speed timing closure of key digital blocks within the Xilinx Versal ACAP. This role sits at the…
Firmware MATLAB Rtl Simulink SystemVerilog +2 skills
4 views 2 weeks ago
Senior Software Engineer (DCV Software)
APACSenior
Taiwan
Zhubei City, Hsinchu County*English resume is required* Role Summary We are seeking a Senior Software Engineer to design, develop, and maintain software for diagnostics, calibration, and verification (DCV) of semiconductor Automatic Test…
Automation C++ Firmware Python Test Automation