River AI Inc. — 12 open jobs

River AI is hiring an IT Lead to build and run its entire IT function on-site in Palo Alto: designing secure cloud and network infrastructure, managing devices (MDM), IAM, security incident response, disaster recovery, vendor management, and IT support as the AI company scales.

AI Authentication Cloud Cybersecurity Go-to-Market +6 skills

Design Verification Emulation, Hardware

Open 20d North America

United States

River AI is hiring an emulation-focused design verification engineer to verify IP and SoC hardware for its personal AI devices on emulation platforms like Palladium, Protium, ZeBu, and HAPS. Day to day the role translates DV plans into emulation workloads, builds models and infrastructure, debugs failures with DV block owners, and provides emulation signoff, using Python/SystemVerilog and agentic

Acceptance Criteria Agentic AI AI Automation Bash +9 skills

RTL Design Engineer, Hardware

Open 46d North America

United States

Designs and implements RTL for custom AI accelerator and SoC silicon in SystemVerilog, owning architecture, micro-architecture, timing closure (STA), and PPA, while collaborating with compiler, performance modeling, verification, and physical design teams. Based in Palo Alto, CA or Austin, TX.

AI Assembly C++ Deep Learning Firmware +6 skills

Software Engineer, Distributed Training

Open 37d North America

United States

Systems engineer building the distributed training infrastructure behind River AI's personal-AI platform — making fine-tuning and reinforcement learning fast, numerically correct, and reliable across large GPU clusters using Python, PyTorch/JAX, parallelism, and GPU optimization.

AI API C++ CUDA Deep Learning +7 skills

Software Engineer, GPU Kernels

Open 37d North America

United States

Builds performance-critical GPU kernels (attention, matrix multiplication, mixture-of-experts, low-precision FP8/FP4 compute) for River AI's training and inference infrastructure. Day to day: profiling workloads, writing kernels with CUDA/Triton/CUTLASS in C++ and Python, and integrating optimizations into training and serving runtimes.

AI C++ CUDA Deep Learning Fine Tuning +4 skills

Software Engineer, Inference Systems

Open 37d North America

United States

Builds and optimizes the model-serving runtime behind River's AI API — request scheduling, continuous batching, KV-cache management, and multi-GPU execution — to deliver fast, reliable, cost-efficient inference for large transformer models and RL sampling workloads. Core stack: Python, C++/Rust, CUDA, and frameworks like vLLM/SGLang/TensorRT-LLM.

AI API C++ CUDA Deep Learning +7 skills

Software Engineer, River API

Open 46d North America

United States

Systems engineer at River AI building the high-performance distributed infrastructure that trains its personal-AI models — writing custom GPU kernels, profiling end-to-end, and scaling clusters of thousands of nodes. Core stack: C/C++/Rust, GPU architectures, InfiniBand/RDMA, and frameworks like PyTorch/JAX.

AI C++ Deep Learning Distributed Systems JAX +4 skills

Physical Design Engineer, Hardware

Open 46d North America

United States

Own the physical implementation of River AI's custom AI accelerator silicon, from RTL synthesis through place-and-route, timing/electrical closure, and sign-off physical verification on advanced nodes (7nm and below), maximizing PPA. Core tools include Innovus, Fusion Compiler, PrimeTime, RedHawk, and UPF/CPF power-intent flows.

AI API Automation Deep Learning Machine Learning +3 skills

Performance Engineer, Hardware

Open 46d North America

United States

Hardware performance engineer at River AI who builds high-fidelity C++/SystemC simulators and performance models for custom AI accelerator silicon, runs micro-architectural 'what-if' studies, characterizes AI workloads, and correlates models against RTL/FPGA emulators while co-designing with compiler, kernel, and RTL teams.

AI Automation C++ CUDA Deep Learning +4 skills

Kernel Engineer (Custom Silicon), Hardware

Open 46d North America

United States

Design and build C++ kernel generators that programmatically emit optimized custom ISA assembly for River's custom silicon, tuning deep learning primitives like GEMM and FlashAttention. Day to day spans code generation, microarchitectural tuning, memory hierarchy optimization, and HW/SW co-design with silicon, compiler, and research teams.

AI Assembly C++ CUDA Deep Learning +1 skills

Design Verification Engineer, Hardware

Open 46d North America

United States

Design verification engineer ensuring River AI's custom AI silicon is functionally correct: defining verification plans, building UVM/SystemVerilog test benches, coverage models, formal proofs, and emulation environments (ZeBu/Palladium), while collaborating with RTL, performance, and compiler teams.

AI Automation Bash CI/CD Deep Learning +8 skills

Compiler Engineer, Hardware

Open 46d North America

United States

Build the compiler stack for River AI's custom AI silicon, lowering PyTorch graphs to optimized custom ISA assembly using MLIR/LLVM. Day to day: writing compiler passes, backend toolchain work (scheduling, register allocation), memory/loop optimizations, kernel integration, and HW/SW co-design with RTL and architecture teams.

AI Assembly C++ CUDA Deep Learning +3 skills

200K – 420K $

Apply