ASIC backend designer (Graduate)
Summary
Entry-level ASIC back-end (physical design) engineer joining Retym's silicon design team in Yerevan: a recent graduate works alongside senior engineers on block- and chip-level implementation using RTL2GDS flows (synthesis, floorplan, placement, CTS, routing) and timing closure on 2nm-and-below nodes. Core skills: VLSI/CMOS fundamentals, STA, Linux, Tcl.
FWe are looking for a Junior ASIC Back-End (Physical Design) Engineer to join our silicon design team. The ideal candidate is a recent graduate or early-career engineer with a strong foundation in VLSI concepts and an interest in ASIC physical implementation and timing closure.
You will work closely with seasoned physical design engineers on block- and chip-level implementation, learning industry-standard flows and tools on advanced 2nm and below tech nodes.
Requirements
Minimum Qualifications
- Bachelor’s degree in electrical engineering, Computer Engineering, or related field
- Strong understanding of:
- Digital logic and CMOS fundamentals
- VLSI physical design concepts
- Setup/hold timing and basic STA
- Familiarity with the ASIC RTL2GDS flow: Synthesis → Floorplan → Placement → CTS → Routing
- Basic experience with Linux environments
- Basic Tcl scripting skills
- DFT awareness
Preferred Qualifications
- Team player
- Highly motivated
- Learning abilities
- Good communication in English