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MediaTek 聯發科技

<Automotive>Power architect and SOC digital designer_Automotive/Smartphone

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Description

1. Define power architecture and develop hardware/software co-design technologies and strategies to optimize system power performance.
2. Design microprocessor-based controller and HW assistance designs for power control related design in smartphone and automotive products
3. Conduct power and clock tree analyses to identify opportunities for power optimization

Requirements

1. Expertise in RTL coding in Verilog/VHDL/SV of complex designs with multiple clock domains and multiple power domains
2. Familiar with UPF and power domain crossing
3. Familiarity with various bus protocols like AHB, AXI, SPMI, I2C, SPI
4. Familiar with low power design methodology and related design experience is advantageous.
5. Strong understanding of computer architecture is required and experience of embedded processors (DSP/MCU) system design is advantageous.
6. Should possess good communication skills to ensure effective interaction with Engineering Management and team members.
Education: Master's Degree

Skills

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