<Automotive>SoC Power and Performance Architect / Designer

<About the team>
We are MediaTek's Low Power Team, defining the SoC power architecture and driving MediaTek’s position as the worldwide leader in low-power performance.

<What you will do and learn>

• Design and verify RTL IPs for power control circuits and microprocessor-based controllers.
• Analyze power and clock tree data to uncover optimization opportunities.
• Define power states and hardware management architectures for peak efficiency.
• Collaborate on power delivery architecture and hardware/software co-design alongside senior engineers.

#LI-LL1

• Master's degree or above in Electronics, Electrical Engineering, Computer Science or a related field.
• Fundamentals of Verilog / SystemVerilog RTL design (coursework, a capstone project or an internship all count).
• Self-motivated, open to coaching, and comfortable communicating across teams.
• Coursework in computer organization / computer architecture and projects in low power design. (nice-to-have).
• Understanding of bus protocols such as AMBA AXI / CHI, NoC. (nice-to-have)
• Project experience in embedded processor (DSP / MCU) system design. (nice-to-have)
• Basic scripting ability in Python or Perl. (nice-to-have)