Design Verification Engineer ( pipeline experience)
Description
This job is located in Gachibowli, Hyderabad, India 500032
Responsible for pre-silicon RTL verification of a complex low power, high performance design that includes digital and analog cores. Some of the responsibilities include but not limited to testbench/testplans development, block level verification, full-chip verification, coverage driven verification, system & architectural compatibility verification and assertions driven verification. You will also be responsible for mentoring and training junior Engineers.
* 1+ year of industrial experience in pre-silicon verification
* Hands on experience with System Verilog, NTB/VERA, SPECMAN, C/C++ and Perl
* Core CPU Design Verification experience ( AMD ARM APPLE INTEL NVIDIA ORACLE Qualcomm)
* Assembly language test writing/debug is a plus, as is familiarity with UVM/OVM
Soft Machines – India
SMSilicon India Private Limited
Kapil Towers, Financial District,
Gachibowli, Hyderabad, India 500032
