FPGA資深/主任工程師_5G(台北/新竹)

<Job Description>
1. Responsible for FPGA/RTL digital circuit design, development, and debugging
2. Verilog/RTL coding, synthesis, and optimization for timing and area constraints
3. Perform functional verification and simulation based on system requirements
4. Assist in identifying and resolving hardware/logic-level issues (debugging)

<Requirements>
1. Proficient in Verilog / VHDL for design and debugging
2. Familiar with RTL-level synthesis, simulation, and verification flow
3. Basic proficiency in C or scripting (Windows or Linux environment)
4. FPGA development experience (any industry background welcome)

<Required Skills>
Open / Not specified

<Key Skills>
Linux, C, RTL, Verilog, VHDL