<GPU>GPU Design Verification Engineer

• Collaborate with architects and cross-functional teams to understand GPU specs and define verification strategies.
• Develop SystemVerilog/UVM test frameworks and co-simulation environments; verify GPU logic at unit, subsystem, and top levels.
• Create and execute verification test plans, focusing on functional coverage.
• Generate random and directed test sequences; maintain testbench, scoreboard, BFMs, and regression.
• Perform RTL and coverage analysis; optimize test scenarios and address bug escapes.
• Support performance verification, emulation, data collection, debugging, and PPA improvements.
• Conduct formal verification.

#LI-LL1

• MS/PhD in CS, EE, CE or related field, or equivalent
• 5+ years ASIC design verification experience
• Skilled in test planning, SystemVerilog/UVM, constrained random, functional coverage, co-simulation, scripting
• Strong problem-solving, debugging, and root cause analysis
• Hands-on with computer architecture & GPU pipeline
• Effective teamwork and communication (verbal & written)
• Adaptable to fast-changing, multi-site environments
• Preferred: GPU shader subsystem and GPU architecture experience