RTL Design Engineer - VHDL/Verilog

Job Description :

- Requirements generation and RTL design using VHDL/Verilog.

- FPGA development using Xilinx/Altera (Intel) FPGA platforms.

- Perform synthesis, floorplanning, timing analysis, and timing closure activities.

- Develop and maintain FPGA verification and simulation environments.

- Work on high-speed interfaces and protocols including PCIe, Ethernet, ARINC, and SERDES.

- Perform Static Timing Analysis (STA) and optimize FPGA designs for performance and reliability.

- Participate in FPGA architecture design, integration, testing, and debugging activities.

- Follow DO-254 development lifecycle practices for Aerospace and Defense applications.

- Collaborate with cross-functional engineering teams throughout the product development lifecycle.

Required Skills :

- Strong expertise in VHDL and/or Verilog.

- Hands-on experience with Vivado and/or Quartus tools.

- Experience with Xilinx, Altera, or Intel FPGA platforms.

- Knowledge of PCIe, Ethernet, ARINC protocols, and Multi-Gigabit Transceivers (SERDES).

- Strong understanding of RTL design, FPGA verification, STA, floorplanning, and timing closure.

- Exposure to Aerospace, Avionics, or Defense Electronics projects is preferred.