Point your AI agent at freehire and let it find you a job.

Get the CLI →

Velaura AI, Inc.

NewBe an early applicant

RTL Designer

Posted Updated
Discussion

Summary

Designs, implements, and optimizes RTL (Verilog/SystemVerilog) for core SoC components — compute engines, memory subsystems, interconnect fabrics, DMA engines, and power-management logic — collaborating on microarchitecture, hardware-software co-design, and performance/power/area tradeoffs alongside verification and physical design teams.

You will design, implement, and optimize RTL for core SoC components. You will collaborate on microarchitecture and hardware-software co-design, define hardware interfaces and execution flows, analyze performance bottlenecks, improve implementations, and partner with verification and physical design throughout development.

Responsibilities

  • Design, implement, and optimize RTL for key SoC components
  • Collaborate with architects to develop microarchitectures
  • Participate in hardware-software co-design discussions
  • Define hardware interfaces, execution flows, memory hierarchies, and performance-critical interactions
  • Contribute to compute engines, memory subsystems, interconnect fabrics, control processors, DMA engines, and power-management logic
  • Optimize designs for performance, power, area, scalability, and reliability
  • Partner with verification and physical design teams throughout development
  • Analyze performance bottlenecks and propose architectural and implementation improvements
  • Use AI-assisted development workflows to improve productivity, quality, and design exploration
  • Participate in design reviews

Requirements

  • Experience designing RTL for complex digital systems
  • Strong understanding of computer architecture, microarchitecture, and digital design fundamentals
  • Experience with Verilog, SystemVerilog, and modern RTL design methodologies
  • Familiarity with performance, power, and area tradeoffs
  • Understanding of memory systems, interconnects, caches, DMA engines, or accelerator architectures
  • Experience with hardware-software co-design and system-level performance optimization
  • Strong debugging and problem-solving skills
  • Ability to work effectively in a collaborative, multidisciplinary engineering environment

Benefits

  • Equity compensation
  • Medical coverage
  • Dental coverage
  • Vision coverage
  • Paid time off
  • Flexible work arrangements

Skills

Apply

See also

Design jobs by country — openings, pay and top skills →

Tailor your CV for this role?

We couldn't check your fit for this role — add a CV to your profile to see it next time.