SRAM Bitcell Engineer

We are seeking a Device/Circuit Engineer to join our SRAM bitcell development team. The ideal candidate will have a strong foundation in device physics and circuit design, with practical experience in advanced process technology. You will work alongside experienced engineers in a collaborative environment to design and optimize SRAM bitcells for implementation across multiple TI product lines.

Key Responsibilities

• Technical Execution:
  • Support the design and development of SRAM bitcells at advanced CMOS nodes
  • Execute bitcell simulations and performance analysis under various PVT conditions
  • Assist in defining and reviewing bitcell performance against specifications
  • Support qualification activities and reliability characterization
• Project Support
  • Contribute to project planning and track progress against milestones
  • Document design decisions and maintain project records
  • Support risk identification and mitigation activities
  • Meet project deliverables and qualification standards
• Collaboration and Communication
  • Work with senior engineers and SRAM circuit architecture teams on memory bitcell design
  • Coordinate with process teams to understand technology constraints
  • Present technical findings and progress updates to team leads
  • Participate in design reviews and technical discussions
• Learning and Development
  • Stay current with industry trends in memory design and process technology
  • Actively seek feedback and mentorship from senior engineers
  • Contribute to process and design improvements

• Education
  • Ph.D. in device physics, electrical engineering, or related field, OR
  • Master's degree in related field with 3+ years of relevant experience
• Experience
  • 0-2 years of professional experience in device/circuit design, process development, or SRAM design
• Technical Skills
  • Working knowledge of SRAM bitcell design and basic circuit tradeoffs
  • Solid understanding of MOSFET device physics fundamentals
  • Familiarity with advanced CMOS process technology
  • Proficiency in simulation tools (e.g., Cadence Virtuoso, SPICE, Sentaurus)
• Personal Attributes
  • Strong problem-solving and analytical skills
  • Excellent written and verbal communication abilities
  • Ability to work effectively in a team environment
  • Strong time management and attention to detail
  • Willingness to learn and take on challenging assignments
• Desirable
  • Internship or co-op experience in semiconductor device/circuit design or process development
  • Exposure to reliability challenges at transistor and bitcell level (retention, soft errors)
  • Experience with silicon characterization or measurement
  • Track record of delivering quality work on schedule