資深數位IC設計工程師/Senior SoC Design Engineer
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Summary
Senior digital IC / SoC design engineer in Taipei: does RTL coding and digital circuit design, integrates and develops mass-production chips with full tape-out experience, builds SoC verification flows (functional verification, DFT: Scan/MBIST/Boundary Scan), and integrates systems over AXI, AHB, APB, PCIe, and DDR.
1. 負責 RTL Coding 與數位電路設計，進行 SoC 整合與量產晶片開發，具備完整流片經驗。
2. 建立並執行 SoC 驗證流程，包含功能驗證與 DFT (Scan/MBIST/Boundary Scan) 規劃與實作。
3. 熟悉標準匯流排與互連協定 (AXI, AHB, APB, PCIe, DDR)，能進行系統級整合。