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A Senior Hardware SME troubleshoots and manages enterprise PC/desktop hardware globally, ensuring compliance with security/operational standards while optimizing IT processes and vendor relationships for healthcare professionals.
Supports Marvell’s networking hardware (switches, PHYs, SoCs) by troubleshooting customer issues, designing solutions, and training teams—bridging Avnet’s FAEs and Marvell’s engineering.
An FPGA specialist who partners with Arrow’s sales teams to provide technical support, consult on customer design requirements, and drive demand creation for electronic components. Focuses on FPGA-based solutions, training, and relationship management with customers and suppliers.
Designs, manages, and optimizes large-scale HPC/AI hardware infrastructure (GPU/CPU nodes) for NorthMark’s cloud compute fleet, focusing on provisioning, firmware lifecycle, troubleshooting, and automation to ensure peak performance and availability.
Research Fellow designing open-source RISC-V processors and AI accelerators, using Verilog/SystemVerilog and EDA tools to advance digital IC research and mentor students.
Leads the design of advanced analog circuits for high-speed clocking and I/O PHY solutions, owning the full lifecycle from specification to post-silicon validation. Focuses on PLL/DLL/CDR and transmitter/receiver circuits for chip-to-chip interconnects, ensuring performance and yield in sophisticated CMOS processes.
An internship designing RTL for HBM SoC logic die, collaborating with architecture/verification teams to implement high-performance SoC solutions and integrating AI-driven tools into workflows.
Chip Design Verification Engineer verifying and simulating performance and power management IPs using RTL verification methodologies, in close collaboration with design and architecture teams at NVIDIA.
Hardware Development Engineer designing analog, digital, power, and high-frequency circuits for electronic toll collection and intelligent transportation systems, taking products from concept through verification to industrialization.
Design complex digital hardware, PCB assemblies, and embedded electronics for defense and surveillance imaging/sensing products using FPGAs/SoCs, high-speed digital interfaces, and embedded processors from concept through production.
The Senior Field Applications Engineer provides technical support for Broadcom's networking hardware, including Ethernet switches, NICs, and PHY products. The role involves performing PCB and signal integrity reviews, hardware debugging, and collaborating with sales teams to secure design wins.
The High Speed Digital Design Engineer will own the design, simulation, and validation of high-speed interfaces like DDR, Ethernet, and SerDes for Amazon's LEO satellite customer terminals. The role involves component selection, schematic capture, signal integrity analysis, and lab testing to ensure robust performance for high-volume manufacturing.
Hardware engineer designing PCBA, high-speed digital and RF circuitry, and phased array antenna systems for Amazon's low Earth orbit satellite internet network, owning designs from concept through production.
The Senior Hardware Engineer will design and optimize advanced antenna systems for Project Kuiper's satellite constellation, including developing prototypes, RF circuitry, and automated test systems. The role involves leading PCB layout efforts and conducting antenna bring-up and testing campaigns.
The Senior Hardware Engineer will design and develop baseband hardware for high-performance signal analysis and network measurement instruments. The role involves managing high-speed digital interfaces, power management, and memory subsystems while collaborating with cross-functional teams to bring products from engineering to manufacturing.
Xsquare is seeking a detail-oriented Electronics Engineer to join our hardware team on a part-time basis. This role is critical in transitioning our autonomous forklift designs into a formalized, production-ready…
R&D engineer responsible for physical design and implementation of high-performance System-On-Chip ASICs (500M–800M gates) at 5nm/3nm/2nm nodes using commercial and in-house EDA tools, collaborating with RTL teams and supporting customers.
The Hardware Engineer will design and integrate mechanical components for autonomous forklift platforms, focusing on sensor mounting, cabling, and industrialization. The role involves collaborating with software and electrical teams to transition prototypes into robust, manufacturable products using CAD and BOM management tools.
This role involves architecting and designing high-speed mixed-signal SerDes circuits and high-performance digital circuits for automotive audio-video applications. The engineer will manage the full ASIC design flow from RTL to GDSII, including verification, synthesis, and timing closure.
Designs and verifies high-reliability digital electronics for aerospace and defense, performing schematic capture, component selection, layout oversight, and cross-functional integration with FPGA, firmware, and software teams.
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