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我们正在寻找一名具备五年以上研发经验的硬件工程师，负责机器人关节控制器、灵巧手控制器、主控板及相关嵌入式硬件平台的设计与产品化。岗位覆盖瑞萨 MCU、MPU 或 SoC 平台，以及数字/模拟电路、电源、通信接口、传感器和执行机构硬件。候选人将参与需求分析、器件选型、原理图与 PCB 设计、样机调试、可靠性验证和量产导入，并与嵌入式软件、结构、算法、测试及供应链团队协同。 负责基于瑞萨 R-Car、RZ、RH850、RA 等系列…
Staff FPGA Verification Engineer leading verification, debugging, and qualification of FPGA-based hardware for satellite and aerospace communication systems, using HDL, UVM Framework, and tools like Vivado and QuestaSim.
Responsibilities Responsible for implementing ISP Algorithm into HW using Verilog, SystemVerilog and/or SystemC (High Level Synthesis) Define ISP HW Architecture based on product features and performance requirements,…
Description: You would be part of a dynamic digital SoC design team that develops state-of-the-art video processing, neural processing, advanced video analytics accelerators, and the entire Camera Processor SoC. You…
Key Responsibilities Key Responsibilities RTL Design and Verification Develop synthesizable RTL in Verilog/SystemVerilog for custom on-chip test, monitoring, and diagnostic IP targeting analog and mixed-signal failure…
Company: Qualcomm India Private Limited Job Area: Engineering Group, Engineering Group > Hardware Engineering General Summary: As a leading technology innovator, Qualcomm pushes the boundaries of what's possible…
Design, develop, and debug PCB evaluation hardware for low-power ARM-based SoCs, collaborating with software, design, and field engineering teams to support customer and internal needs.
Designs hardware architecture for Google’s wearable products, focusing on ambient/edge computing and on-device AI. Balances performance, power, cost, and form factor while collaborating with silicon vendors and cross-functional teams.
About Tau Power conversion is the bottleneck between the compute, energy, and mobility industries and the future they're trying to build. Most of the industry is still solving it with decades-old approaches. Tau is…
Leads PCB design for AI silicon hardware, focusing on high-complexity, high-layer-count boards (20+ layers) with ultra-high-speed interfaces (PCIe Gen5/6, CXL) and power delivery for AI accelerators. Owns layout methodology, automation, and tooling to scale hardware development.
This Staff Digital Design Engineer role involves leading the development of digital functions for mixed-signal products, covering the full lifecycle from architecture and RTL design to physical implementation and production maturity. The role requires expertise in SystemVerilog, digital synthesis, and DFT methodologies within a collaborative team environment.
Designs and develops high-performance hardware solutions, leads board design, and conducts testing and debugging for cutting-edge technology products.
This part-time role provides manual labor support to the Dallas County Elections Department by preparing, staging, and managing election supplies and equipment. The position involves warehouse operations, operating heavy equipment like forklifts, and driving delivery vehicles.
Staff Digital Design Engineer responsible for FPGA/ASIC RTL design, board-level schematic capture, and system architecture for aerospace and defense applications (electronic warfare, radar, communications) using Verilog/VHDL, high-speed interfaces, and PCB tools.
RELOCATION ASSISTANCE: Relocation assistance may be available CLEARANCE REQUIRED FOR START: Yes CLEARANCE TYPE: Secret TRAVEL: Yes, 10% of the Time Description At Northrop Grumman, our employees have incredible…
Design and optimize FPGA fabric architecture—interconnect, routing, logic elements, memory blocks, and clocking—at Microchip's FPGA Business Unit, using full-custom mixed-signal design, HDLs (Verilog/VHDL), and scripting on advanced process nodes.
The Senior Staff Engineer (Test Engineering Lead) will lead a team to define and execute test strategies for hardware products, including production test systems, field device debugging, and COTS validation. The role requires extensive experience in hardware and embedded software testing within a fleet safety and AI-powered telematics environment.
Company: Qualcomm Canada ULC Job Area: Engineering Group, Engineering Group > ASICS Engineering General Summary: Join us to build IP blocks that power Snapdragon processors and AI inference engines. Qualcomm's…
Staff Perception Hardware Engineer responsible for end-to-end physical integration, validation, and manufacturing deployment of Apollo humanoid robot's camera, optics, and high-speed perception hardware systems.
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