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quadric
2 views 3 days ago

Staff SoC Design Engineer

NewBe an early applicant HybridNorth AmericaStaff

Staff SoC Design Engineer at Quadric, an edge-AI silicon company in downtown Burlingame, CA. You'll own SoC subsystem development and third-party IP integration (NoC, PCIe/UCIe, DDR, security), drive PPA optimization and timing closure through tapeout, and package designs for customer releases. Core stack: SystemVerilog/Verilog, VCS, Verilog/C co-simulation.

AI C++ Embedded Systems FPGA Neural Networks +3 skills
170K – 230K $
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Pure Storage
1 views 3 days ago

Sr. Demand Planning Manager

NewBe an early applicant North AmericaContractSenior
United States

Everpure (NYSE: P) has evolved from storage pioneer to data platform, closing fiscal 2026 with $3.7 billion in revenue, its first billion-dollar quarter, and accelerating growth into FY27. Our strategic agenda spans…

Accessibility AI Assembly Data Modeling ERP +3 skills
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Tenstorrent
12 views 3 days ago

Field Application Engineer, South East Asia

Open 52d RemoteAPACFull-time
Singapore

Tenstorrent is hiring a Field Application Engineer in Singapore to act as the technical bridge to customers across Southeast Asia — running AI/ML technical evaluations, demos, proof-of-concepts, and deployments of its AI accelerator platforms, and troubleshooting across hardware and software. Core stack: Python, PyTorch/TensorFlow, cloud deployment, and hands-on server/PCIe hardware work, with reg

AI Business Development Cloud C++ CUDA +13 skills
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Tenstorrent
3 days ago

Copy of Field Application Engineer, South East Asia

NewBe an early applicant RemoteAPACFull-time
Malaysia

Tenstorrent is leading the industry on cutting-edge AI technology, revolutionizing performance expectations, ease of use, and cost efficiency. With AI redefining the computing paradigm, solutions must evolve to unify…

AI Business Development Cloud C++ CUDA +13 skills
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Astera Labs
17 views 3 days ago

Firmware Engineer (Internship) - Vancouver

Open 137d North AmericaInternshipIntern H-1B sponsor history — This employer has had H-1B petitions approved by USCIS in the last five fiscal years, per the USCIS H-1B Employer Data Hub. The approval belongs to the employer and is not a commitment to sponsor this role.Canada LMIA employer — This employer was issued a positive Labour Market Impact Assessment by Employment and Social Development Canada in the last four quarters, through the High Wage, Global Talent or Permanent Resident streams. The approval belongs to the employer and is not a commitment to sponsor this role.
Canada

Develops firmware and microcontroller subsystems for AI connectivity hardware using C/C++, Python, and RTOS, debugging with JTAG and lab tools in Vancouver.

AI CI/CD Cloud C++ Embedded Software +9 skills
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Astera Labs
10 views 3 days ago

Platform Applications Engineer Intern (8-month Co-Op)

Open 137d North AmericaInternshipIntern H-1B sponsor history — This employer has had H-1B petitions approved by USCIS in the last five fiscal years, per the USCIS H-1B Employer Data Hub. The approval belongs to the employer and is not a commitment to sponsor this role.Canada LMIA employer — This employer was issued a positive Labour Market Impact Assessment by Employment and Social Development Canada in the last four quarters, through the High Wage, Global Talent or Permanent Resident streams. The approval belongs to the employer and is not a commitment to sponsor this role.
Canada

Intern designs and maintains tools to integrate, debug, and deploy Astera Labs' AI connectivity hardware and software, working with PCIe, Ethernet, CXL, and related technologies.

AI Automation Cloud C++ C# +6 skills
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Astera Labs
3 views 3 days ago

Technical Chief of Staff for ASIC Engineering

Open 139d North AmericaC-level H-1B sponsor history — This employer has had H-1B petitions approved by USCIS in the last five fiscal years, per the USCIS H-1B Employer Data Hub. The approval belongs to the employer and is not a commitment to sponsor this role.Canada LMIA employer — This employer was issued a positive Labour Market Impact Assessment by Employment and Social Development Canada in the last four quarters, through the High Wage, Global Talent or Permanent Resident streams. The approval belongs to the employer and is not a commitment to sponsor this role.
United States

Leads engineering operations and ASIC tapeout management for a semiconductor company, driving decision velocity and execution rigor in San Jose, CA.

AI Ethernet PCIe Program Management
216K – 300K $
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Astera Labs
12 views 3 days ago

Senior ATE Test Engineer

Open 58d North AmericaSenior H-1B sponsor history — This employer has had H-1B petitions approved by USCIS in the last five fiscal years, per the USCIS H-1B Employer Data Hub. The approval belongs to the employer and is not a commitment to sponsor this role.Canada LMIA employer — This employer was issued a positive Labour Market Impact Assessment by Employment and Social Development Canada in the last four quarters, through the High Wage, Global Talent or Permanent Resident streams. The approval belongs to the employer and is not a commitment to sponsor this role.
United States

Senior ATE Test Engineer at Astera Labs defining SoC test strategy and building ATE test programs and hardware (Advantest 93k) for mixed-signal connectivity silicon, taking products from first samples through high-volume production ramp. Work centers on SerDes production test at 16Gbps+, DFT, high-speed protocols like PCIe/Ethernet/DDR, and C/C++/Python.

AI C++ Ethernet Express.js I2c +6 skills
136K – 170K $
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Astera Labs
9 views 3 days ago

Principal Design Verification Engineer- SerDes/PHY IP

Open 58d North AmericaPrincipal H-1B sponsor history — This employer has had H-1B petitions approved by USCIS in the last five fiscal years, per the USCIS H-1B Employer Data Hub. The approval belongs to the employer and is not a commitment to sponsor this role.Canada LMIA employer — This employer was issued a positive Labour Market Impact Assessment by Employment and Social Development Canada in the last four quarters, through the High Wage, Global Talent or Permanent Resident streams. The approval belongs to the employer and is not a commitment to sponsor this role.
United States

Astera Labs is hiring a Principal Design Verification Engineer to own functional verification of high-speed SerDes/PHY IP for its AI connectivity semiconductors. Day to day, this person architects UVM/SystemVerilog verification environments, drives coverage closure through tape-out, and verifies PHY behavior against PCIe Gen 6/7, UALink, UCIe, and Ethernet standards, including analog/mixed-signal

AI Automation Ethernet Firmware PCIe +5 skills
207K – 230K $
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Netlist
4 views 3 days ago

Recruiting Coordinator

Open 15d North America
United States

Recruiting Coordinator Reports To: Senior Manager, Human Resources Company Overview: Netlist, Inc. (OTCQB: NLST) is a leading provider of high-performance modular memory subsystems and next-generation storage-class…

AI Cloud PCIe
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Themesoft Inc
3 days ago

Onsite_Hardware Design and Failure Analysis Engineer_ San Jose, CA

NewBe an early applicant On-siteNorth AmericaContract
United States

Title: Hardware Design and Failure Analysis Engineer Location: San Jose, CA (Onsite) Work Arrangement: Onsite Employment Type: Contract Duration: 6 Months Primary Skills: High-Speed System Architecture & Debugging,…

Automation AWS Cloud PCIe Python +2 skills
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MediaTek
3 days ago

Technical Program Management Manager

NewBe an early applicant APAC
Taiwan

This is an internal facing role that is highly focused on execution excellence, organizational alignment and on-time delivery of all Zion ASIC designs. This role coordinates complex multi-disciplinary efforts spanning,…

AI GPU PCIe Program Management SerDes
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ALTEN Polska
3 days ago

Lead Site Reliability Engineer (SRE)

NewBe an early applicant HybridEuropeFull-timeSenior
Poland

WHO WE ARE? WE ARE A GLOBAL LEADER IN ENGINEERING AND IT SERVICES . At ALTEN, we see our specialists as architects—designers of tomorrow’s world . As a leader in engineering and IT services, we support companies in…

AI Bash CI/CD DHCP DNS +8 skills
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TEKEVER
3 days ago

Senior Hardware Engineer

NewBe an early applicant HybridEuropeSenior
Portugal

Mission: The SAR Product Team is looking for an experienced and highly motivated Senior Hardware Engineer to lead the design and development of advanced electronic systems for airborne and spaceborne SAR payloads. This…

Ethernet FPGA I2c Oscilloscope Pcb +2 skills
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nou Systems
5 views 3 days ago

Senior Embedded Engineer

NewBe an early applicant North AmericaFull-timeSenior
United States

Hands-on senior embedded engineer at defense contractor nou Systems in Huntsville, AL, owning prototype hardware end to end: FPGA design (VHDL/Verilog), PCB design (Altium), C/C++ firmware for microcontrollers and SoCs, lab bring-up/debug, and Python test automation for missile defense, sensing, and space programs. In-person role; US citizenship and Secret clearance required.

AI Altium Assembly Automation C++ +31 skills
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OSI Systems, Inc
2 views 3 days ago

Embedded Software Engineer 3

NewBe an early applicant North AmericaFull-time
United States

Overview Continental Electronics Corporation is a leading provider of RF technologies and innovative solutions with 80 years of proven performance. CEC has experienced significant recent growth and has established…

AJAX Bash Corrective Action C++ Embedded Software +20 skills
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HRU-Tech
2 views 3 days ago

Senior Hardware Design Engineer (15172) (Sterling Heights, MI)

NewBe an early applicant North AmericaContractSenior
United States

HRU-Tech is hiring a Senior Hardware Design Engineer (long-term contract-to-hire) in Sterling Heights, MI to design ruggedized electrical circuit boards and I/O hardware, from schematic and PCB design through prototyping, testing, qualification, and production support. Core skills: analog/digital circuit design, PCB layout, hardware debugging, and military EMC/environmental standards.

Corrective Action C++ Ethernet FPGA Microcontrollers +5 skills
60 – 65 $ / hr
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HRU-Tech
2 views 3 days ago

FPGA Design Engineer (15095) (Sterling Heights, MI)

NewBe an early applicant North America
United States

FPGA Design Engineer in Sterling Heights, MI developing FPGA designs for video/image processing, control systems, and system interfaces. Involves creating IP in VHDL/Verilog/HLS, using the Xilinx toolchain (Vivado, Vitis), timing closure, verification, and embedded development on Linux and RTOS. Requires a relevant bachelor's degree and 10+ years of experience.

C++ Embedded Software Embedded Systems Ethernet FPGA +9 skills
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HRU-Tech
2 views 3 days ago

FPGA Design Engineer (15173) (Sterling Heights, MI)

NewBe an early applicant North America
United States

Designs and supports FPGA firmware (VHDL/Verilog, Xilinx Vivado/Vitis, Zynq UltraScale+ SoC) for high-voltage and I/O hardware on General Dynamics Land Systems military vehicles. Day to day: requirements breakdown, IP integration, timing closure, simulation, and lab debug at the Sterling Heights, MI site.

Ethernet FPGA Git I2c Jira +3 skills
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ПАО Сбербанк
10 views 3 days ago

Разработчик электроники (Центр Квантовых технологий)

Open 64d CIS
Russia

Сбер начинает работу над квантовым компьютером и аналоговыми вычислителями. Мы предлагаем вам присоединиться к команде Центра Квантовых Технологий Сбера, чтобы решать самые интересные задачи на переднем крае науки и…

Altium FPGA PCIe Python SerDes
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