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Acerca del rol Supervisor/a campos clínicos Dar seguimiento al desempeño de cada estudiantes y docentes dentro de las sedes clínicas, así como asegurar la correcta ejecución del plan de estudios en el desarrollo de…
CScale is a startup backed by Sutter Hill Ventures and Atreides Capital - headquartered in Palo Alto, CA. Our executive team has a demonstrated track record of building and scaling category-defining semiconductor and…
Hands-on technical lead for SoC design verification at CspeedIO, a startup building optical interconnect semiconductors for AI infrastructure. The role owns testbench architecture (SystemVerilog/UVM and C-based), verification strategy and sign-off, coverage closure, and mentoring DV engineers from Bangalore.
Senior Design Verification Engineer (5-7 years) on the Data Center Connectivity DV team, building UVM testbenches from scratch for CPUSS/SoC verification, running functional and power-aware simulations, gate-level sims, and integrating VIPs for protocols like AXI, MAC and PHY at an optical semiconductor startup targeting AI infrastructure interconnects.
A hybrid data analyst/data scientist role that builds reports, data models, automations, and machine-learning plus generative-AI solutions for a production site's digital transformation. Core stack includes Python, SQL (PostgreSQL/Snowflake), Power BI/Grafana, and Microsoft Copilot tools.
Au sein de la Direction des Opérations, vous intégrez l’équipe en charge de la conception et la réalisation d’équipements électroniques embarqués rentrant dans la composition de nos produits. Objectif de votre stage :…
Architects, develops, and integrates RTL and reusable IP for Fortaegis' FPGA and ASIC-based semiconductor products — writing SystemVerilog/Verilog, running synthesis and timing closure with EDA tools (Vivado, Synopsys, Cadence), and collaborating with verification, architecture, and software teams. On-site in Amsterdam.
Qui sommes-nous ? : Créée en 2016, KICKMAKER est une communauté de talents aux profils pluridisciplinaires et complémentaires, animés par la même passion pour le développement de produits high-tech et les défis…
Senior FPGA engineer building high-performance digital systems for defence, aerospace, and industrial automation projects, working on-site in Wrocław. Day to day involves RTL design and verification with VHDL/Verilog/SystemVerilog, Xilinx Vivado/Intel Quartus toolchains, SoC FPGA platforms (Zynq/MPSoC), embedded C/C++ and DSP.
In dieser Rolle übernimmst du Verantwortung für die Weiterentwicklung einer skalierbaren digitalen Plattform und gestaltest aktiv die Zukunft unserer Produkte mit. Du arbeitest an der Schnittstelle von Business, UX/UI…
Die Elsdorfer Molkerei und Feinkost GmbH steht seit 1909 für Innovation und Wachstum. Als Teil der Bauer Gruppe mit insgesamt ca. 1.400 Mitarbeitern an 5 Standorten in Deutschland sind wir ein bedeutender Anbieter für…
Job Descriptions Develop and Review Test Plan based on IC design specification Develop constrained-Random verification environment for complex DUT Develop/Modify Testbenches and test programmes using UVM-SV for…
Job Description Develop and execute verification plans for Pre-Silicon IP/ASIC/SoC designs based on design specifications. Build and maintain SystemVerilog/ UVM-based verification environments and testbenches Develop…
Silicon Labs (NASDAQ: SLAB) is the leading innovator in low-power wireless connectivity, building embedded technology that connects devices and improves lives. Merging cutting-edge technology into the world’s most…
As the global leader in high-speed connectivity, Ciena builds the critical infrastructure powering the AI era. We’re a technology company shaping the future of networking, guided by innovation, integrity, and…
Job Details: Job Description: The Role and Impact Join our team as an SoC Logic Design Engineer where you will play a critical role in developing Intel's next-generation Client System-on-Chip (SoC) products. In…
Wir suchen Sie als IT-Spezialist! (m/w/d)Fachinformatiker SystemintegrationDie ITKOM IT - u. Kommunikation GmbH & Co. KG ist ein Systemhaus in Mittelhessen. Wir unterstützen Unternehmen durch Optimierung und…
A senior semiconductor design verification engineer role developing SystemVerilog/UVM testbenches and verification environments for advanced memory data buffer products (DDR6 and future generations) targeting data center, AI, and cloud computing. Day to day involves verification planning, coverage-driven testing, debugging failures, and mentoring on a block and system level.
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