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New College Graduate Hardware ASIC Engineer role at NVIDIA in Shanghai, focused on SoC/chip design, verification, DFT, and post-silicon validation using VLSI, RTL, UVM, and physical design methodologies.
NVIDIA has been transforming computer graphics, PC gaming, and accelerated computing for more than 25 years. It’s a unique legacy of innovation that’s fueled by great technology—and amazing people. Today, we’re tapping…
Role Overview The Arm Solutions Engineering Physical IP group is building a team focused on the development of custom and semi-custom digital hard macros used across Arm CPU, GPU, NPU, and SoC products. These hard…
Designs and optimizes ASIC RTL (Register Transfer Level) logic for hardware chips, ensuring functionality, performance, and manufacturability in a full-time onsite role at an engineering services company.
The Senior Digital IC Design Engineer will architect, implement, and verify MCU/DSP systems and hardware accelerators using Verilog/SystemVerilog. The role involves leading project activities, coordinating with software teams on SDK development, and improving design methodologies.
We Are Synopsys is the leader in engineering solutions from silicon to systems, enabling customers to rapidly innovate AI-powered products. We deliver industry-leading silicon design, IP, simulation and analysis…
Company: Qualcomm Semiconductor Limited Job Area: Engineering Group, Engineering Group > ASICS Engineering General Summary: As a forward thinking technology company, Qualcomm advances the limits of innovation in…
Senior Digital IC Design Engineer About Us At onsemi , we help improve lives through silicon solutions every day. Our intelligent power and sensing technologies solve the world’s most complex challenges and lead the…
Develops and executes pre-silicon verification strategies for ARM Cortex-M firmware controlling power management ICs, using SystemVerilog simulations to test firmware behavior, debug defects, and automate testing with Python/Perl.
Why join Upscale, Inc. Upscale, Inc., is building the high-performance infrastructure powering the next generation of artificial intelligence. Backed by over $500M in funding and rapid global adoption, we are scaling…
Designs and verifies FPGA-based digital circuits for SoC prototyping, including RTL coding, synthesis, and HW/SW co-validation, while collaborating with cross-functional teams.
Lead digital design for power-management ICs, defining architecture, RTL, synthesis, and timing while collaborating with global teams to deliver high-efficiency converters for consumer, industrial, and automotive applications.
Designs and develops ASIC/FPGA digital systems for aerospace/defense programs, including HDL/RTL coding, simulation, timing closure, and integration. Works on advanced projects like satellite systems, aircraft platforms, and autonomous tech, with opportunities for leadership and mentorship.
Job Details: Job Description: Designs and develops FPGA circuits and IPs including FPGA core fabric logic, interconnect routing, clocking, configuration, configurable memory blocks, and network on chip.…
Designs and owns ASIC power management micro-architecture for NVIDIA’s AI chips, from RTL definition to post-silicon enablement, collaborating with architecture, verification, and validation teams.
Chip Design Verification Engineer verifying and simulating performance and power management IPs using RTL verification methodologies, in close collaboration with design and architecture teams at NVIDIA.
We are looking for a Sr. ASIC Design Engineer! NVIDIA is seeking best-in-class ASIC Design Engineers to design and implement the world’s leading SoC's and GPU's. This position offers the opportunity to have…
* Description for Internal Candidates Responsibilities : OnSemi is seeking a Prin Digital design engineer, NEW PRODUCT DEVELOPMENT, Power Management, to join our growing team in Bengaluru, India. This group is…
Designs and implements digital blocks and SoC components for next-gen chiplet power delivery systems, using Verilog/SystemVerilog and collaborating with verification and physical design teams.
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