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Develops safety-critical embedded firmware for automotive ADAS systems, focusing on power management, thermal monitoring, and ISO 26262-compliant diagnostics on ARM Cortex-R5F targets.
Develop embedded C++ software for radar, lidar, and IMU sensors as part of Latitude AI's autonomous driving system, collaborating with hardware engineers and mentoring junior developers.
Senior engineer designing and integrating lidar sensors for Ford’s hands-free ADAS platform, working with cross-functional teams to meet performance, cost, and manufacturability targets.
This position is listed on behalf of a partner company, who manages all applications and next steps. Our partner is looking for a Junior Ubuntu Software Engineer based in Canada. This is an opportunity for an…
Overview At Microsoft Research, we are shaping the next generation of AI infrastructure through high-risk, high-reward programs spanning devices, systems, software, hardware, and AI infrastructure. As a…
Team Summary Our team specializes in testing complex embedded systems for high-performance video capture, streaming, and CV/AI-driven processing. We support two key efforts: developing a next-generation, highly secure…
A senior ASIC design engineer who designs, verifies, brings up, and debugs digital subsystems in electro-optical SoCs for Ayar Labs' co-packaged optics that move data for AI systems. Day to day: RTL in Verilog/SystemVerilog, testbenches, timing constraints and documentation, and Python-driven silicon bring-up.
Own the firmware development lifecycle for Ayar Labs' co-packaged optics products in Bengaluru (on-site): designing and optimizing bare-metal embedded C firmware for electronic-photonic chips with high-speed SerDes, driving silicon bring-up and hardware validation, and mentoring junior engineers.
Owns and scales the front-end CAD/design automation flows for Ayar Labs' ASIC and SoC teams in Bengaluru: building Python/Tcl/Shell/Make tooling for lint, CDC/RDC, regressions, and signoff readiness, supporting Synopsys/Cadence/Siemens EDA deployments, and championing AI-assisted CAD agents and workflows.
Senior hardware/embedded engineer at Ayar Labs in Hsinchu designing embedded electronics and laser driver architectures (control loops, monitoring firmware) for co-packaged optics that move data for AI systems. Day to day: analog/digital schematic capture and PCB layout support, component integration, hardware bring-up and debugging, and cross-functional work with optics, packaging, and manufactur
Writes Python software to automate hardware test runs, data analysis, and instrument control for Ayar Labs' optical interconnect chips (SuperNova, TeraPHY), enabling high-volume production. Works with instrument drivers, test recipes, Git/CI-CD, and MongoDB/PostgreSQL in a startup test engineering team.
Ayar Labs is hiring a hands-on ASIC engineer to design, verify, and bring up digital subsystems in electro-optical SoCs for its co-packaged optics products that move AI data over light. Day to day this means writing Verilog/SystemVerilog RTL, building testbenches, defining timing constraints, and debugging custom silicon with Python and firmware.
Owns new product introduction (NPI) electronic hardware design for Ayar Labs' External Laser Source modules: PCB schematics, specs, validation test plans, and coordination across optical, mechanical, and thermal teams. Core tools include Altium PCB design, low-noise analog design, electro-optics (TIA, laser drivers), circuit simulation, and Python test automation. Full-time on-site in San Jose.
Senior embedded firmware engineer at Ayar Labs who owns the firmware lifecycle for co-packaged optics products — designing control firmware for electronic-photonic chips with high-speed SerDes, mentoring engineers, and collaborating across hardware, software, and validation teams. Core stack: bare-metal C on microcontrollers/ARM, Git, JIRA, CI/CD.
Ayar Labs is hiring a Senior Embedded Firmware Engineer in San Jose to design, test, and bring up bare-metal C firmware that controls high-speed SerDes interfaces and photonic subsystems in its co-packaged optics products for AI data infrastructure. The role spans firmware architecture, unit/integration testing, CI/CD, and first-silicon debugging.
A senior photonics design engineer at Ayar Labs designs, simulates, and characterizes integrated photonic components (couplers, gratings, micro-ring resonators) for the company's co-packaged optics AI infrastructure products. Day to day: device design, test-vehicle planning and measurement-driven iteration, building Python simulation/analysis tooling, and collaborating across packaging, laser, cir
Ayar Labs is hiring a Senior Principal Engineer, SoC Architect in San Jose (on-site) to define next-generation SoC architectures for high-performance semiconductor products — leading high-speed I/O integration (PCIe, CXL, UCIe, SerDes, Ethernet), performance/power modeling, and cross-functional technical leadership from concept through silicon realization.
Sr. Staff Engineer designing and debugging digital subsystems for Ayar Labs' electro-optical ASICs (co-packaged optics that move AI data over light). Day to day: writing RTL in Verilog/SystemVerilog, building testbenches, defining timing constraints, and doing silicon bring-up/debug with Python, C/C++, and firmware — on-site in San Jose.
Ayar Labs is hiring a Sr. Staff Embedded Firmware Engineer in San Jose (on-site) to design bare-metal C firmware controlling high-speed SerDes and photonic subsystems, from architecture through silicon bring-up and customer deployment. The role involves unit/integration testing, CI/CD, and close collaboration with analog, digital, photonic, and validation teams.
Designs and develops embedded electronic hardware and low-level firmware for laser module integration at Ayar Labs in San Jose, CA — spanning analog/digital circuit design, laser driver architectures, component selection, bring-up/debugging, and design verification through production, partnering with optics, packaging, and manufacturing teams.
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