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Hardware - Signal/Power Integrity Engineer (On-/Off-Chip)
Design and optimize signal/power integrity for AI hardware, running EM/circuit/system simulations and guiding chiplet/3D-IC layouts to ensure robust AI-native compute.
Hardware - Thermal Engineer
Designs end-to-end thermal solutions for AI hardware (NPU/ASIC to server chassis), balancing cooling methods (air/liquid/immersion) via CFD simulations and real-world testing to optimize performance and reliability.
Productization & Validation Engineer (양산실장평가, 경력)
About FuriosaAI FuriosaAI builds high-performance, high-efficiency AI compute for the Inference Era. Founded in 2017 by veteran semiconductor and AI algorithm engineers, Furiosa operates globally with offices in Korea…
Silicon Ecosystem Partnerships Director - Taiwan
About FuriosaAI FuriosaAI builds high-performance, high-efficiency AI compute for the Inference Era. Founded in 2017 by veteran semiconductor and AI algorithm engineers, Furiosa operates globally with offices in Korea…
Systems Software Engineer, NPU Management Interface
Develops firmware/software for NPU management interfaces, handling communication between host systems and AI accelerators via protocols like MCTP/PLDM, while ensuring telemetry, health monitoring, and compliance with industry specs.
Systems Software Engineer, PCIe Device Driver
Develop and maintain Linux PCIe device drivers and kernel modules for FuriosaAI's AI-native compute platform, optimizing DMA, IOMMU, and high-performance I/O pipelines.
Solutions Architect - US
Design and deploy AI/LLM models on FuriosaAI’s RNGD NPU using the Furiosa SDK, running POCs, benchmarks, and debugging for US customers while translating technical capabilities into business value.
Hardware - Mechanical Engineer
Mechanical engineer at AI chip maker FuriosaAI who designs and develops the mechanical structure of AI accelerator NPU cards, servers, and rack systems using PTC Creo — handling 3D modeling, tolerance/interference reviews, prototyping through EVT/DVT/PVT, and design-for-manufacturing (CNC, sheet metal, die casting, injection molding) alongside cross-functional teams.
[115 年度智匯菁英選拔賽｜投遞後另約面談] 硬體系統設計工程師 (System Design Engineer) _ CTO Office (台北)
我們專注於前瞻技術開發，致力於將複雜的AI演算法轉化為高效能晶片架構。誠摯邀請熱愛挑戰、渴望定義未來的你，加入台達晶片設計團隊。在這裡，你的電路設計都將成為未來資料中心、機器人、智慧製造、永續能源的動力核心。開拓台達電子全球未來事業版圖，這就是屬於你的技術舞台！ 本職缺主要工作內容: 1.負責Edge AI系統(Board Level) 的架構設計、電路圖設計與 PCB 佈局（Layout）審查。 2.FPGA設計與驗證：利用…
Principal Infrastructure Engineer, AI Cluster Performance & Validation
A principal-level engineer on Nscale's AI Infrastructure Operations team who defines how multi-thousand-GPU AI clusters are validated and tuned for production: building Python control-plane and burn-in tooling, running real distributed training/inference workloads, and debugging performance across GPUs, InfiniBand/RoCE fabrics, storage, and SLURM/Kubernetes schedulers.
Principal Solutions Architect
A customer-facing principal architect at Nscale designs end-to-end GPU infrastructure for demanding AI workloads — GPU cluster and rack design, InfiniBand/RoCE networking, storage, and Kubernetes/Slurm orchestration — plus performance benchmarking with NCCL/DCGM and AI-driven automation using Terraform, Ansible, Python, and Go.
【研發替代役】5G Small Cell 硬體研發工程師(內湖)
【部門介紹】 智能生活應用事業部致力於提供創新解決方案，打造更智慧的生活與互聯環境，並與全球領先企業深度合作，不斷推動 AIoT與網路技術創新，提供符合智慧家庭、智慧建築及企業級應用需求的整合方案，持續引領市場趨勢。 三大核心產品領域： • 智能監控攝影機解決方案 • AIoT與Edge Control智慧家庭/建築解決方案 • 企業級網通產品 (Switch、Wi-Fi Router、5G小型基地台) 【工作內容】 5G…