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Senior Design Verification Engineer

Open 131d APACSenior

Senior Design Verification Engineer (5-7 years) on the Data Center Connectivity DV team, building UVM testbenches from scratch for CPUSS/SoC verification, running functional and power-aware simulations, gate-level sims, and integrating VIPs for protocols like AXI, MAC and PHY at an optical semiconductor startup targeting AI infrastructure interconnects.

AI API AutoGen Automation Ethernet +8 skills

Senior RTL Design Engineer

Open 131d APACSenior

CspeedIO, a stealth startup building optical semiconductors for AI data-center connectivity, is hiring a Senior RTL Design Engineer in Bangalore to own RTL and microarchitecture for IP/subsystems — writing SystemVerilog datapath/control logic (FIFOs, arbiters, CDCs) and driving the front-end flow from lint and CDC through synthesis, timing, and tape-out.

AI Ethernet Fiber Git Networking +4 skills

Advanced Micro Devices, Inc

Staff Product Applications Engineer-Silicon Debug & Embedded Systems

Open 24d North AmericaStaff

Customer-facing applications engineer at AMD supporting Adaptive SoC and AI Edge devices: owns escalated customer cases from bring-up through production, with a focus on silicon debug (root-causing failures across processing subsystems, interconnect, memory and boot path) plus owning the embedded Linux release and customer documentation. Core stack: Vivado/Vitis, Yocto/PetaLinux, SystemVerilog/Ver

AI Automation Bash C++ Embedded Linux +16 skills

DDR Mixed-Signal Circuit Design Engineer

At Apple, we work every single day to craft products that enrich people’s lives. Do you love working on challenges that no one has solved yet? We have an opportunity for a detailed and extraordinarily hardworking PHY…

Principal ASIC Design Engineer - Chip Lead

On-siteNorth AmericaContractPrincipal

Please Note: To conform with the United States Government Space Technology Export Regulations, the applicant must be a U.S. citizen, lawful permanent resident of the U.S., conditional resident, asylee or refugee…

Asic Cmos Program Management Rtl Uvm +1 skills

Castelion Corporation

HWIL FPGA Engineer

North AmericaContract

Why Castelion, Why Now Castelion is moving incredibly fast to develop and deliver advanced defense systems at a time when execution matters more than ever. We believe focus, ownership, and excellence are decisive…

Embedded Systems FPGA Itar Oscilloscope SystemVerilog +2 skills

FPGA Engineer

Open 135d North America Licensed UK sponsor H-1B sponsor history

Designs and optimizes FPGA-based hardware for ultra-low-latency trading systems, coding in VHDL and collaborating with software teams to enhance market-making infrastructure.

Big Data C++ FPGA Machine Learning SystemVerilog +2 skills

200K – 200K $

FPGA Engineer

Open 132d Europe Licensed UK sponsor H-1B sponsor history

Designs and implements low-latency hardware trading systems using FPGAs and ASICs, collaborating with traders and software engineers to solve complex financial market problems.

C++ SystemVerilog Verilog VHDL

FPGA Engineer

Open 132d North America Licensed UK sponsor H-1B sponsor history

Designs and implements high-speed FPGA-based trading systems to accelerate network infrastructure and trading components, working closely with traders and software engineers.

C++ SystemVerilog Verilog VHDL

200K – 200K $

FPGA Engineer Intern (Summer 2027 - Chicago)

Open 97d North AmericaInternshipIntern Licensed UK sponsor H-1B sponsor history

FPGA Engineer Intern designs high-speed hardware for trading systems, optimizing nanosecond response times and parallelized algorithms in a global financial firm.

AI FPGA Networking Verilog VHDL

Graduate FPGA Engineer (2027 Start - Chicago)

Open 97d North AmericaInternshipJunior Licensed UK sponsor H-1B sponsor history

Designs ultra-low-latency FPGA-based trading systems in VHDL/Verilog, optimizing hardware for nanosecond-scale financial market applications.

AI FPGA Networking Verilog VHDL

200K – 200K $

FPGA Internship (2027 Start)

Open 70d EuropeInternshipIntern Licensed UK sponsor H-1B sponsor history

FPGA Internship where the intern builds latency-critical hardware systems for trading, working on parallel algorithms, networking interfaces, and FPGA applications using VHDL/Verilog/SystemVerilog.

AI FPGA Networking SystemVerilog Verilog +1 skills

CHAOS Industries

Senior Systems Engineer, Algorithm Development - Effectors

Open 24d North AmericaFull-timeSenior

CHAOS Inc. is a global technology company delivering next-generation capabilities to the defense and critical industrial sectors. Founded in 2022 by a seasoned leadership team, CHAOS has quickly become the place where…

Agile C++ Firmware GPU MATLAB +5 skills

FPGA Design Engineer

We are building the next generation of distributed, ultra-low latency control stacks for massive-scale compute architectures. Our technology powers world-class research facilities and industrial systems globally,…

Automation Bash C++ Embedded Software FPGA +7 skills

Advanced Micro Devices, Inc

Interconnect Micro-architect/RTL Design Engineer

Open 24d North America

At AMD's Infinity Fabric Architecture and RTL team in Austin, you'll design next-generation coherent interconnects linking CPUs, GPUs, and accelerators. Day to day that means micro-architectural exploration, writing synthesizable Verilog/SystemVerilog RTL, optimizing for power/performance/area/timing, unit testing, and post-silicon debug.

AI C++ GPU Perl Python +2 skills

careers.huaweirc.ch

Research Intern: Agentic System-Level Hardware Design

EuropeInternshipIntern

Our company Huawei is a leading global information and communications technology (ICT) solutions provider. Through our constant dedication to customer-centric innovation and strong partnerships, we have established…

Agentic AI Cloud Firmware LLM Python +3 skills

Fortaegis Technologies

Digital Design Engineer

Open 24d Europe Licensed NL sponsor

Architects, develops, and integrates RTL and reusable IP for Fortaegis' FPGA and ASIC-based semiconductor products — writing SystemVerilog/Verilog, running synthesis and timing closure with EDA tools (Vivado, Synopsys, Cadence), and collaborating with verification, architecture, and software teams. On-site in Amsterdam.

Automation Ethernet Firmware FPGA Networking +9 skills

Testek Solutions

Electronics Design Engineer

Open 24d On-siteNorth America

Established in 1969, Testek is the leader in Aerospace and Aircraft Component Test Equipment. Testek is a small company with approximately 170 team members, with the headquarters located in Wixom, Michigan. We pride…

Altium Assembly C++ Ethernet FPGA +13 skills

Freelance - Ingénieur FPGA

Open 24d HybridEuropeContract

Qui sommes-nous ? : Créée en 2016, KICKMAKER est une communauté de talents aux profils pluridisciplinaires et complémentaires, animés par la même passion pour le développement de produits high-tech et les défis…

CI/CD C++ Ethernet FPGA Git +9 skills

General Dynamics Mission Systems, Inc

ASIC FPGA Engineer

Open 24d RemoteNorth America

Basic Qualifications Education Requirements: Bachelor's degree in Electrical or Computer Engineering, or a related Science, Engineering or Mathematics field, plus a minimum of 2 years of relevant experience; or…

AI Corrective Action C++ Cryptography Cybersecurity +6 skills