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DSP Systems Engineer, Staff Location: Toronto, Ontario, Canada Department: Systems Engineering Work Location: onsite Company: Qualcomm Canada ULC Job Area: Engineering Group, Engineering Group > Systems Engineering…
Senior PWB Designer creates high-density circuit boards for mobile, modem, and IoT devices using Mentor Xpedition, PADS, and Cadence Allegro.
Architect high-performance ASICs for networking hardware, defining microarchitecture, RTL design, and silicon bring-up while balancing performance, power, and schedule constraints.
Designs and runs automated and manual tests for embedded storage software, writes test plans in C/C++, and tracks bugs in JIRA to ensure product quality.
Builds embedded firmware in C, Go, and Python for prototype sensors, writing Linux/bare-metal drivers, signal processing, and hardware abstraction layers for resource-constrained ARM devices.
Develop and debug power, thermal, and telemetry software for Intel server platforms using C/C++ and Python to ensure optimal performance and validate hardware.
Silicon Validation Engineer Location: Bengaluru, Karnataka, India Workplace: on_site Employment Type: full Description Role Summary The Silicon Validation Engineer will be responsible for functional, performance, and…
Develops Linux kernel drivers and embedded software for hardware subsystems like audio, display, and PCIe, optimizing performance and debugging kernel issues.
Develops, debugs, and validates firmware for platform security, power management, memory, or BMC on embedded systems using C, OpenSSL, and hardware debug tools.
Develops low-level firmware for cutting-edge SSDs using C/C++, NVMe/PCIe/SATA standards, and Agile workflows while collaborating with hardware teams.
Leads architecture and design of next-gen high-performance test platforms, focusing on high-speed digital, signal/power integrity, and system integration for memory validation systems.
Design AI inference systems and memory architectures, optimizing performance, power, and bandwidth for AI/ML workloads while collaborating with hardware and software teams.
Lead hardware bring-up, validation, and production support for Crusoe’s AI compute systems, focusing on PCIe, InfiniBand, and NVMe/storage to ensure reliability and performance at scale.
Design, debug, and validate high-performance AI compute hardware (GPU/CPU) with focus on PCIe, InfiniBand, and NVMe/storage to ensure reliable, scalable production systems.
Design and benchmark storage architectures for AI/HPC clusters, authoring reference guides and reproducible experiments to guide AMD’s customers and internal teams on hardware and software choices.
ADVANCE YOUR CAREER. ADVANCE THE WORLD. At AMD, we believe technology can change lives for the better. It can heal us, entertain us, and make us more connected, productive, and understanding of the world around us. And…
Senior engineer verifying complex processor designs using SystemVerilog/UVM, formal tools, and coverage-driven flows to ensure functional correctness of Network-on-Chip IPs and SoCs.
Leads end-to-end validation of AI and hyperscale server platforms, coordinating electrical, firmware, and system-level tests to ensure product readiness and compliance.
Design next-generation Adaptive SoCs, balancing compute, memory, AI, and high-speed I/O while optimizing power, signal integrity, and package-board co-design.
Verify and validate AMD’s next-gen GPU and SoC designs using SystemVerilog/UVM, emulation platforms, and formal methods to ensure silicon meets performance, power, and functional specs.
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