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Digital ASIC Design Engineer
Designs and optimizes digital ASICs for next-gen semiconductor systems, handling RTL coding, synthesis, timing analysis, and validation in a high-tech Swiss engineering environment.
Senior Staff - SoC Architect
We are seeking an experienced Senior Staff - SoC Architect with 8+ years of expertise in SoC architecture, microarchitecture development, RTL design, low-power methodologies, and post-silicon debug. The candidate will…
IP Firmware Design Engineer
Design and verify firmware for calibrating high-speed DDR/LPDDR memory interfaces on FPGAs, integrating with Quartus Prime and collaborating across hardware/software teams.
Senior Principal FPGA & Digital Signals Processing Engineer
Lead FPGA firmware architecture for a portable SIGINT/EW platform, migrating GPU DSP algorithms to FPGA and optimizing real-time RF signal processing for defense missions.
Senior Staff - SOC RTL Design Engineer (MCU)
Role Overview We are looking for a highly skilled RTL Designer to develop high-performance, scalable, and power-efficient digital designs for next-generation SoCs and Chiplets targeting AI, HPC, and Networking…
ASIC Design - Principal Engineer
Why join Upscale, Inc. Upscale, Inc., is building the high-performance infrastructure powering the next generation of artificial intelligence. Backed by over $500M in funding and rapid global adoption, we are scaling…
Senior FPGA Design Engineer
Designs and implements FPGA-based prototypes for ASIC validation using Verilog, high-speed interfaces, and Quartus Prime Pro, collaborating with cross-functional teams to optimize timing and debug hardware.
SrvDigital Design Engineer
Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into…
Sr Digital Design Engineer
Senior engineer designing and optimizing RTL for DRAM digital and mixed-signal blocks, collaborating across teams to meet PPA targets using Verilog/SystemVerilog and synthesis/STA flows.
Principal Design Verification Engineer, HBM
Lead verification of high-bandwidth memory (HBM) and DRAM designs using SystemVerilog/UVM, ensuring functional correctness and performance for Micron’s memory products.
ASIC Design Engineer Intern (Video Silicon IP) - 2027 Summer
About the team Our team is building industry-leading, highly efficient, and scalable video codec hardware solutions (FPGA and ASIC) from the ground up to better serve our billions of users. We are looking for strong…
GPU RTL Design Engineer
Designs and implements GPU hardware in Verilog/SystemVerilog, optimizing for performance, power, and area while collaborating with verification teams.
ASIC/FPGA Verification engineers
Design and run verification environments for ASIC/FPGA chips using SystemVerilog/UVM, then execute test cases to ensure hardware correctness.
RTL Designer – Physical AI Compute
Design and optimize RTL for AI-focused System-on-Chip components, focusing on performance, power, and area while collaborating on verification and physical design.
Principal/Staff Design Verification Engineer
Leads verification strategy for complex IC designs, guiding teams to build test environments, debug RTL, and improve coverage using UVM, SystemVerilog, and RISC-V protocols.
Principal FPGA Engineer - Markets Technology
Senior FPGA engineer designing ultra-low-latency hardware accelerators for an exchange’s trading platform, setting standards and mentoring teams.
Lead Application Engineer
At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology. Responsibilities: • Engage with customers to understand verification challenges and identify suitable…