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Designs and debugs FPGA firmware for X-ray detector systems, integrating hardware and optimizing high-speed interfaces like Gigabit Ethernet and PCIe.
Разрабатывает и отлаживает проекты для ПЛИС на VHDL/Verilog, используя Vivado/ISE/Quartus и симуляторы Modelsim/Vivado/ISE.
Principal FPGA Engineer designing next-gen surgical camera tech using VHDL/Verilog, C/C++, and Python while leading a team and interfacing with hardware sensors and DDR memories.
Lead architecture, design, and verification of FPGA-based firmware for secure defense systems using VHDL and Xilinx/Altera toolchains, guiding teams from concept to deployment.
Leads FPGA firmware architecture, design, and implementation for defense-grade cryptographic systems, ensuring compliance, security, and reliability in high-assurance environments.
Principal Digital Design Engineer designing secure embedded controllers and cryptographic hardware for automotive, industrial, and defense markets using ASIC/FPGA flows, Verilog/VHDL, and security countermeasures.
Design and implement high-performance CPU frontend features for RISC-V cores using Chisel/Verilog, focusing on instruction fetch, decode, and branch prediction while collaborating with verification and physical design teams.
Lead a team designing CPLD/FPGA logic for server and storage products using Verilog/VHDL, I2C, SPI, and validation flows.
Develops embedded software for FPGA and microcontrollers, integrates with hardware, and writes HDL (VHDL/Verilog) to build avionics and embedded systems.
Senior C/C++ engineer building Electronic Design Automation tools that help global manufacturers design chips and systems faster and more cost-effectively.
Senior embedded engineer designing and optimizing firmware/software for storage hardware, bridging hardware (FPGA) and software (Linux/RTOS) domains, and leading system integration from concept to production.
Designs and optimizes VHDL/Verilog hardware components for networking systems (SmartNICs, optical switches), writes test cases in Python, performs timing analysis, and collaborates with software/networking teams on system-level debugging.
Develop and test embedded cryptographic software for real-time systems in C/C++ and Rust, integrating firmware and hardware in an Agile environment with DoD Secret clearance.
Build FPGA-based ultra-low-latency trading systems in Verilog/VHDL, automate RTL generation, and collaborate on real-time capital-markets infrastructure.
An intern in AMD’s Singapore design center works on cutting-edge IC design tasks like analog/digital design, verification, or post-silicon validation using EDA tools such as Cadence and Synopsys, contributing to high-speed SerDes and AI-related chips.
Design and verify FPGA hardware for defense systems using VHDL, targeting AMD/Altera/Microchip devices and collaborating with systems engineers.
Lead FPGA design and architecture for defense electronics using VHDL, targeting Xilinx/Altera/Microsemi devices, and verify with constrained-random testing.
Designs and validates high-speed optical communication chips, writing RTL, running simulations, and debugging silicon to meet power and performance targets.
Lead architecture for high-reliability power and analog subsystems in next-gen missile guidance electronics, driving trade studies and integration across extreme environments.
What you’ll do Act as the in-house electrical lead for Midjourney Medical: own the electrical architecture of the scanner and the technical direction for all board-level design. Own complex board design end-to-end:…
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