Tech jobs
Job listings
STAFF ASIC Design Engineer
Designs and implements next-gen SSD controller ASICs, writing RTL, collaborating on verification, and optimizing flows with AI-assisted tools.
Analog Design, Sr Staff Engineer - 18317
We Are Synopsys is the leader in engineering solutions from silicon to systems, enabling customers to rapidly innovate AI-powered products. We deliver industry-leading silicon design, IP, simulation and analysis…
Director, Silicon Physical Design CAD
Lead a team in Bangalore to define and scale physical design methodologies and CAD flows for Microsoft’s custom silicon (Azure Cobalt and Maia), driving AI-driven automation and first-pass silicon success.
Lead Product Validation Engineer - SI/PI
Lead validation of Cadence’s Sigrity SI/PI/EM simulation tools, designing test plans, automating regressions, and ensuring product quality for high-speed PCB and IC designs.
Senior FPGA Design Engineer / Hardware Engineer
Design and optimize FPGA systems to reduce latency and boost throughput for a proprietary trading firm, using SystemVerilog and automated verification.
Microprocessor VLSI Physical Design Engineer
Design high-speed VLSI circuits for next-gen CPUs, optimizing power, performance, and area while collaborating across teams to solve complex hardware challenges.
FPGA Engineer
With our groundbreaking satellite 5G constellation, OQ Technology is a global leader in IoT communication connectivity and associated services. We are a venture capital-backed company with a successful track record of…
Инженер-программист ПЛИС (работа в офисе)
Develops FPGA-based digital signal processing and communication protocol modules in Verilog/SystemVerilog, tests and integrates them with hardware, and participates in lab and system testing.
Senior/Staff Front-End Engineer (SOC)
Design and implement Verilog RTL for SoC blocks, integrate IPs, and optimize performance through synthesis, timing closure, and power reduction in a semiconductor R&D team.
Analog Design Engineer- eInfochips
Designs high-performance analog/mixed-signal circuits (PLLs, ADCs/DACs, RFIC) using Cadence Virtuoso, Spectre, and Mentor Calibre, with multi-node process experience from 28nm to 7nm.
Инженер-разработчик ПЛИС (FPGA designer)
Разрабатывает и отлаживает проекты для ПЛИС на VHDL/Verilog, используя Vivado/ISE/Quartus и симуляторы Modelsim/Vivado/ISE.
Design Verification Engineer
Design Verification Engineer builds and runs test environments for complex ASIC and mixed-signal IP using SystemVerilog/UVM, coverage analysis, and debug to ensure correctness before tape-out.