Retym
Developing coherent DSP silicon for AI data center infrastructure.
Company facts
- Founded
- 2021
- Employees
- 150
- Headquarters
- United States
- Type
- Private
- Funding
- Series D · $182M · 2025
Open positions
VLSI Design Engineer
VLSI Design Engineer responsible for designing cutting-edge communication systems from scratch, including micro-architecture definition, RTL coding in Verilog/SystemVerilog, synthesis, timing analysis, and PPA optimization, collaborating closely with verification, DFT, and physical design teams.
System Integration Engineer
Hands-on system integration engineer at Retym (Ramat Gan, fully on-site) who brings up and validates PCBs, EVBs, and optical modules with customer platforms — debugging silicon-to-system issues, analyzing BER/signal integrity in the lab, and building Python/MATLAB test automation. Requires a B.Sc. in EE and 6+ years of hardware/system validation experience.
Optical DSP Chief Architect
Leads DSP system architecture for high-speed optical transceivers (800G/1.6T+), optimizing algorithms like equalization and clock/data recovery while collaborating with hardware/photonics teams to design next-gen optical chips.
System Validation engineer
As System Validation engineer, you will play a crucial role in designing, testing, and troubleshooting Analog circuits within a laboratory setting. Your expertise in Analog electronics and proficiency in operating…
System Director Manager
Overview The System Director Manager for Optical Digital DSP base Systems is a senior leadership role responsible for managing and directing the development, implementation, and optimization within optical…
Engineering Site Manager – Semiconductor Startup
About the Company Retym is an innovative semiconductor startup developing next-generation chips for high-speed communication systems. Our mission is to redefine performance and efficiency in data transmission through…
ASIC backend designer (Graduate)
Entry-level ASIC back-end (physical design) engineer joining Retym's silicon design team in Yerevan: a recent graduate works alongside senior engineers on block- and chip-level implementation using RTL2GDS flows (synthesis, floorplan, placement, CTS, routing) and timing closure on 2nm-and-below nodes. Core skills: VLSI/CMOS fundamentals, STA, Linux, Tcl.
Senior Embedded SW Engineer
Senior Embedded SW Engineer builds and maintains DSP firmware from scratch, working across low-level, infrastructure, and application layers while collaborating with digital/analog engineers and international teams.