Point your AI agent at freehire and let it find you a job. A CLI and an MCP server over the whole job API — no browser.
Develops and verifies ASIC/FPGA designs for Boeing’s space and aerospace electronics, focusing on digital ICs, SoCs, and high-performance processors using HDLs, UVM, and simulation tools.
Designs and verifies ASIC/FPGA hardware for Boeing’s aerospace and space electronics, including satellite systems and aircraft components, using SystemVerilog, UVM, and hardware emulation tools.
ASIC/FPGA design and verification engineer developing digital ICs/SoCs for Boeing's satellite and avionics programs in Mountain View, CA, using Verilog/VHDL/SystemVerilog, UVM, and ARM IP.
Design, develop, and integrate custom radio and RF hardware for national security missions, spanning architecture, PCB design, FPGA integration, and RF characterization.
The Firmware Software Engineer will design and build software tooling, firmware, and infrastructure to support semiconductor design, verification, and post-silicon validation. The role requires strong C, C++, and Python skills to work alongside hardware teams in a remote environment.
At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology. Cadence is a pivotal leader in electronic design, building upon more than 30 years of computational software…
At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology. Overview: This role sits at the intersection of deep protocol expertise and direct partnership with our…
Own pre-silicon verification of custom CPU units (fetch, decode, load-store, caches) by building SystemVerilog/UVM environments, developing instruction-level stimulus, running regressions, and supporting FPGA/emulation bring-up.
Own verification for custom AI acceleration units—translating microarchitecture into test/coverage plans, building SystemVerilog/UVM environments, developing GEMM/GEMV reference models, and supporting pre-silicon bring-up.
About Elveo Elveo is what happens when two pioneers in direct-to-device (D2D) communications join forces. Elveo brings together a combined 20 years of expertise to close the coverage gap for more than 50 mobile network…
Be part of a team that pushes boundaries, developing custom silicon solutions that power the future of Google's direct-to-consumer products. You'll contribute to the innovation behind products loved by millions…
Junior AI SoC Design Verification Engineer at Google, planning and executing verification of custom silicon using SystemVerilog, UVM, and formal methods throughout the full development lifecycle to tape-out.
Efficient is developing the world’s most energy-efficient general-purpose computer processor. Efficient’s patented technology uses 100x less energy than state of the art commercially available ultra-low-power…
Developer Operations / DevOps — Bazel Monorepo Location: Bristol / London About Fractile Fractile was founded in 2022 on the bet that, eventually, the world's most capable AI systems would be limited in their…
At Ubitium, we believe the best engineering happens when people with different perspectives tackle hard problems together. We welcome applicants from all backgrounds and experiences. What matters most is curiosity,…
The Lead RTL Design & Validation Engineer will plan and execute the design and validation of DDR memory controller calibration solutions, including RTL logic and firmware routines. The role involves collaborating with cross-functional teams to ensure reliable memory initialization and performance across AMD's custom IP projects.
Designs and executes verification environments for custom silicon (ASICs/TPUs) at Google Cloud, focusing on constrained-random testing, coverage closure, and debugging digital designs with SystemVerilog/UVM. Core tech: SystemVerilog, UVM, SVA, ASIC verification.
As an FPGA Architect, you will design and qualify critical electronic equipment for civil and military aircraft within a DO-254 environment. You will define FPGA architectures, oversee RTL design, and manage verification strategies.
FPGA design engineer on a cross-functional team building cost-sensitive secure products from architecture through production, primarily using VHDL/Verilog/SystemVerilog and Xilinx tools.
We couldn't check your fit for this role — add a CV to your profile to see it next time.
