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About Marvell Marvell’s semiconductor solutions are the essential building blocks of the data infrastructure that connects our world. Across enterprise, cloud and AI, and carrier architectures, our innovative…
Note: This position is posted for Markham, but it is open to candidates across Canada, including Mississauga, Nepean, and Ottawa. The role can be hybrid or fully remote depending on your location and preference. We Are…
Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into…
The mission of the Instrumentation Division is to develop state-of-the-art instrumentation required for experimental research programs at Brookhaven Lab and to maintain the expertise and facilities in specialized high…
Responsibilities: Lead RTL design, simulation, and verification for company ASIC/SoC products, ensuring robustness. Integrate and validate IP blocks for seamless system functionality. Analyze requirements for Power,…
Position Summary Samsung, a world leader in advanced semiconductor technology, is founded on a simple philosophy – the endless pursuit of excellence will create a better world for all. At Samsung Austin Research and…
Job DescriptionJob Description Position Overview Talent 101 is seeking an experienced Digital Design Verification Engineer to support mixed-signal semiconductor devices in which relatively small digital blocks operate…
Designs and verifies FPGA RTL (VHDL/Verilog) for real-time control and data acquisition closest to Q-Block's quantum hardware — high-speed ADC/DAC and serial interfaces, real-time DSP pipelines, and sub-microsecond timing/synchronization across multi-channel, multi-node systems. On-site in Ottawa, spanning design through simulation, timing closure, and on-hardware debug.
Backend engineer doing RTL-to-gate-level logic synthesis and Design-for-Test (scan insertion, ATPG, MBIST, boundary scan) for digital SoC modules, collaborating with RTL and place-and-route teams on SDC, timing, and PPA closure. Core tools: EDA flows like DC/FC/TetraMax, with Verilog, TCL, Perl, and Python scripting.
Graduate engineer at Arm in Budapest working on system IP microarchitecture specification and design, SystemVerilog RTL verification/debug, and formal bring-up of IP blocks, collaborating with design, validation and implementation teams. Core tech: SystemVerilog, AMBA bus protocols, Perl/Python scripting.
SystemVerilog RTL verification and debug for System IP components Formal bring-up of non-trivial IP blocks to achieve required quality levels Collaboration with engineers across design, performance modelling,…
Job DescriptionJob Description Job Title: Senior FPGA Engineer Department: Engineering Reports To: Functional Team Lead / Program Manager FLSA Status: Exempt / Full-time Salary Range: $120k - $150k Annually ROLE We are…
CspeedIO, a stealth startup building optical semiconductors for AI data-center connectivity, is hiring a Senior RTL Design Engineer in Bangalore to own RTL and microarchitecture for IP/subsystems — writing SystemVerilog datapath/control logic (FIFOs, arbiters, CDCs) and driving the front-end flow from lint and CDC through synthesis, timing, and tape-out.
At AMD's Infinity Fabric Architecture and RTL team in Austin, you'll design next-generation coherent interconnects linking CPUs, GPUs, and accelerators. Day to day that means micro-architectural exploration, writing synthesizable Verilog/SystemVerilog RTL, optimizing for power/performance/area/timing, unit testing, and post-silicon debug.
Our company Huawei is a leading global information and communications technology (ICT) solutions provider. Through our constant dedication to customer-centric innovation and strong partnerships, we have established…
ADVANCE YOUR CAREER. ADVANCE THE WORLD. At AMD, we believe technology can change lives for the better. It can heal us, entertain us, and make us more connected, productive, and understanding of the world around us. And…
Autonomai Recruitment is hiring an FPGA Engineer in Dublin (hybrid) to design and develop FPGA-based real-time data processing solutions. The role covers the full design flow from concept to bring-up and integrating FPGA designs with CPUs, GPUs and storage in Linux, using RTL/SystemVerilog and major FPGA toolchains.
Hands-on FPGA firmware engineer at defense contractor L3Harris in Palm Bay, FL, owning RTL design, timing closure, verification, and board bring-up on AMD Xilinx platforms (Zynq UltraScale+, Kintex, Versal) using Vivado, VHDL/Verilog, and lab tools to deliver mission-critical embedded capabilities.
At RF-SoC Solutions, Nijmegen, join a team of technical experts, architects, and innovation leaders developing advanced RF and Mixed-Signal SoC solutions. Our multidisciplinary team spans architecture, design,…
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