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RELOCATION ASSISTANCE: Relocation assistance may be available CLEARANCE REQUIRED FOR START: Yes CLEARANCE TYPE: SAP TRAVEL: No Description At Northrop Grumman, our employees have incredible opportunities to work on…
Job Details: Job Description: The world is transforming - and so is Intel. Intel is a company of bold and curious inventors and problem solvers who create some of the most astounding technology advancements and…
Job Description: 1. Responsible for micro-architecture design and RTL implementation of high-performance CPU front-end pipeline, including instruction fetch, branch prediction, instruction decode, dispatch and…
The GPU Digital Frontend Design Engineer will define microarchitecture, design RTL for high-performance GPU/AI accelerator chips, and optimize for power, performance, and area. The role involves collaborating with verification, software, and physical design teams using Verilog/SystemVerilog and standard EDA tools.
The SoC Digital Design Engineer will design and implement hardware accelerators for video codecs and SoC subsystems using Verilog/SystemVerilog. The role involves architecture definition, RTL implementation, and cross-functional collaboration to optimize power, performance, and area for large-scale video platforms.
Designs and optimizes DRAM circuits using CMOS logic and AI-enabled tools, leading layout and simulations to deliver high-performance memory solutions.
This entry-level role involves developing and verifying digital ICs and SoCs for aerospace and defense applications. Engineers will work on FPGA/ASIC design, simulation, and hardware integration using industry-standard tools and HDL languages.
Job Details: Job Description: Altera is seeking a technically strong Transceivers & Protocol IP Application Engineer to be based in San Jose California Altera Office to help customers and partners successfully…
The ASIC Design Engineer 2 will work on high-speed networking chips, handling tasks from functional specification to final netlist. The role involves RTL coding, timing closure, and debugging using System Verilog and state-of-the-art EDA tools.
The ASIC Design Engineer 2 will contribute to the development of high-speed networking chips by performing RTL coding, micro-architecture specification, and timing closure. This role involves working with state-of-the-art EDA tools to design and debug complex silicon modules for routers and switches.
At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology. Job Profile Role Title Lead Design Engineer, SoC / Subsystem / IP Design Experience 4to 18 years…
Sr. Staff ASIC Design Engineer responsible for microarchitecture and RTL design of high-performance AI inference ASICs using Verilog/SystemVerilog, integrating CPU and third-party IPs, and collaborating with physical design and verification teams.
Design electrical harnesses and interconnects for aerospace/defense programs, leading analog/digital circuit design, PCB layout, and testing using Altium Designer during a 2-3 month engagement.
Senior FPGA Engineer leading RTL design and FPGA development for spaceborne radar systems, working with Verilog/VHDL, synthesis, place-and-route, and timing analysis on FPGA/SoC platforms.
L3Harris is dedicated to recruiting and developing high-performing talent who are passionate about what they do. Our employees are unified in a shared dedication to our customers' mission and quest for professional…
Architect electro-optic systems for AI data center photonics, performing modeling and analysis using Cadence, Python, and RF experiments to validate performance.
Electro-Optic Systems Architect at Lightmatter modeling and analyzing photonics-based optical links for AI data center chips using Cadence simulators (Virtuoso, Spectre, Verilog-A), VPI Photonics, and Keysight ADS; collaborates cross-disciplinarily to co-design analog and photonic devices and validates models through RF experiments.
Lightmatter is leading the revolution in AI data center infrastructure, enabling the next giant leaps in human progress. The company invented the world’s first 3D-stacked photonics engine, Passage™, capable of…
Designs and documents photonic communication fabrics for AI data centers, focusing on silicon photonics components and high-speed interconnects.
Designs and implements test solutions for advanced AI/photonics-based chips, working across digital, analog, and photonic logic to ensure manufacturability and bring products to market.
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