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Experienced Engineer - FPGA Verification Location: Bangalore,Karnataka,India Department: 76 Product Development Work Location: onsite Join our Team About this opportunity: Are you passionate about driving innovation…
Digital Hardware Engineer Location: KNV I Remote Type: Office Based Time Type: Full time Job Description Join us in pioneering breakthroughs in healthcare. For everyone. Everywhere. Sustainably. Our inspiring and…
Designs and verifies high-performance coherent interconnect IP for Samsung’s SoCs, using SystemVerilog/UVM and ARM protocols to ensure low-latency, power-efficient solutions for next-gen mobile devices.
Junior Member of Technical Staff - AI Silicon Digital Design Engineer About Unconventional Since 2022, AI has entered the mainstream, reshaping entire industries from education and software development to fundamental…
About Unconventional: Since 2022, AI has entered the mainstream, reshaping entire industries from education and software development to fundamental consumer behaviors. This revolution has created an unprecedented…
We are looking for a Design Verification Engineer to support SoC-level verification of advanced high-speed and security IP. This role involves close collaboration with design and architecture teams to verify complex…
Lead a team to design, develop, and deliver FPGA/ASIC solutions for avionics systems, using Verilog/SystemVerilog, Xilinx Vivado/Intel Quartus, and adhering to DO-254 standards.
Principal Digital Design Engineer at NXP Semiconductors in Glasgow leads a team to design and implement high-speed in-vehicle networking transceivers using SystemVerilog/Chisel, ensuring automotive-grade performance and safety.
Leads a team of RTL design engineers to architect and develop semiconductor IP and subsystems, focusing on front-end design, verification, and PPA optimization using Verilog/SystemVerilog/VHDL.
Designs, verifies, and implements RTL for power management ICs and SoCs, collaborating with architects and verification teams to deliver high-performance semiconductor solutions.
Are you looking for a unique opportunity to be a part of something great? Want to join a 17,000-member team that works on the technology that powers the world around us? Looking for an atmosphere of trust, empowerment,…
Part-time intern supports digital verification using generative AI, automating workflows with AI tools and scripts while studying nearby Graz.
Senior engineer builds and maintains a Python-based verification framework for semiconductor design, integrating AI triage while ensuring reproducibility and CI/CD for hardware verification teams.
Designs and implements digital ASICs for scientific instruments, focusing on low-power, radiation-aware systems for particle detectors and high-energy physics applications using SystemVerilog/Verilog and EDA tools.
Designs and optimizes custom silicon hardware components for Google's products, focusing on performance, power efficiency, and integration using RTL and Verilog.
Designs and implements PCI Express IP blocks in Verilog/SystemVerilog for AMD’s server, client, GPU, and semi-custom chips, collaborating across RTL, verification, and post-silicon bring-up.
Principal Flight Software Engineer at K2 Space in Los Angeles designs and implements real-time, fault-tolerant control software for high-power satellites using Rust, C++, and Python, with responsibilities spanning architecture, subsystem integration, and on-orbit operations.
Develops and verifies real-time, fault-tolerant flight software for high-power satellites using Rust, C++, and Python, controlling propulsion, attitude, and power systems.
Designs and verifies custom silicon for Google's TPU AI hardware, leading teams to ensure flawless chip performance in AI/ML systems.
Senior FPGA Engineer designs ultra-low-latency trading systems using HDLs like SystemVerilog/VHDL, Python/C++, and collaborates with quants and traders to optimize performance.
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