Skip to content

Search jobs inside your AI agent. ClaudeChatGPTCursorGrok Bot

Connect

Velaura AI, Inc.

Jobs Hiring Closed Discussion

Open positions

7 jobs
Velaura AI, Inc.
13 views last week

Senior Design Verification Engineer

On-siteAPACSenior
India

Develops and executes verification strategies and environments for complex SoC hardware — building UVM/SystemVerilog testbenches, assertions, formal and emulation flows, verifying compute, memory, and interconnect blocks, and supporting emulation, FPGA prototyping, pre-silicon bring-up, and post-silicon debug.

C++ FPGA Prototyping QoS Root Cause Analysis +2 skills
 Sign in to see your match
Velaura AI, Inc.
9 views last week

Design Verification Engineer CPU

On-siteAPAC
India

Verification engineer for a custom CPU: owns functional verification from test planning through coverage closure — building SystemVerilog/UVM environments, writing C/C++ instruction-level stimulus, verifying memory ordering, coherence, and performance, and supporting emulation, FPGA prototyping, and pre-silicon software bring-up.

C++ FPGA Prototyping Root Cause Analysis SystemVerilog +1 skills
 Sign in to see your match
Velaura AI, Inc.
7 views last week

Design Verification Engineer

On-siteAPAC
India

Design Verification Engineer at Velaura AI in Bangalore developing verification strategies and environments for complex SoC hardware: building SystemVerilog/UVM and C/C++ testbenches, verifying compute engines, memory subsystems, and interconnects, and supporting emulation, FPGA prototyping, and post-silicon debug.

C++ FPGA Prototyping QoS Root Cause Analysis +2 skills
 Sign in to see your match
Velaura AI, Inc.
6 views last month

CAD Back-end Lead

Open 35d On-siteAPACLead
India

You will build, integrate, qualify, release, and support CAD flows across custom design, physical implementation, and physical verification. You will develop reusable frameworks, automate regression testing and quality…

Agentic AI AI Ansys Asic Bash +12 skills
 Sign in to see your match
Velaura AI, Inc.
10 views 2 months ago

Design Verification Engineer – CPU

Open 59d On-siteNorth America
United States

Own pre-silicon verification of custom CPU units (fetch, decode, load-store, caches) by building SystemVerilog/UVM environments, developing instruction-level stimulus, running regressions, and supporting FPGA/emulation bring-up.

C++ FPGA Prototyping Root Cause Analysis SystemVerilog +1 skills
 Sign in to see your match
Velaura AI, Inc.
12 views 2 months ago

Senior Design Verification Engineer – Physical AI Compute

Open 69d On-siteNorth AmericaSenior
United States

Design and execute verification plans for a Physical AI SoC using SystemVerilog/UVM, C/C++, assertions, and emulation to validate compute engines, memory, and interconnects.

AI Automation C++ Firmware FPGA +7 skills
 Sign in to see your match
Velaura AI, Inc.
13 views 3 months ago

Design Verification Engineer – Physical AI Compute

Open 69d On-siteNorth America
United States

Develop and execute verification strategies for complex SoC components and systems, building SystemVerilog and UVM environments, verifying hardware-software interactions, analyzing performance and real-time behavior,…

AI Automation C++ Firmware FPGA +7 skills
 Sign in to see your match