MediaTek 聯發科技

<Automotive>CPU Software Engineer

AUTOSAR C++ FreeRTOS GDB RTOS

Support automotive MCU's Board Support Package (BSP) of CPU control: 1. Bringup 2. Performance benchmark measure 3. Integration of MCU/RTOS features/drivers. 4. BSP functionality verification. Requirements 1.…

<Data Center>Senior/Lead DFT CAD and Methodology Engineer

On-siteAPACFull-timeLead

AI Asic Automation Bash CAD +5 skills

We are looking for a highly skilled DFT CAD and Methodology Expert to develop and deploy advanced test methodologies for next-generation data center and AI ASIC. Enhancing the efficiency and quality of our ASIC…

Digital IC Design Engineer_HsinChu

1. Bus and Architecture design and RTL implementation of Smartphone chipset 2. ASIC and Smartphone SoC and mobile computing platform design. 3. System bus and mobile peripheral designs 4. SoC system performance…

FPGA

CPU circuit robustness management engineer

1. Involve in CPU IP pre-silicon circuit design weakness review 2. Develop CPU IP circuit robustness post-silicon test item to screen circuit weakness 3. Develop CPU PI and power MP quality methodology Requirements 1.…

IC Substrate Sourcer

1. Supplier Management: Manage key substrate suppliers and conduct rigorous QCDST evaluations to ensure alignment with MediaTek’s standards. 2. Capacity & Supply Planning: Monitor substrate market dynamics (focusing on…

<GPU>GPU Compiler Developer

Role and Responsibilities: •_x0001_Define GPU compiler software architecture and interfaces. •_x0001_Development/implement GPU compiler pipeline, linking and various optimizations/transformations. •_x0001_Collaborate…

AI API C++ GPU

<Data Center>Low Power integrator

1. SoC low power design, integration, and modeling 2. SoC adaptive voltage scaling development Requirements 1. Familiar with digital IC design, DFT, and FPGA emulation flow 2. Experienced in chip integration 3.…

FPGA

<Data Center>BE integrator

1. Chip integration design 2. Familiar with test mode and DFT/MBIST 3. Familiar with STA and timing signoff 4. System bus and peripheral designs 5. SoC system IO/clock/reset/test mode Requirements 1. Chip integration…

<GPU>CAD/EDA Flow Automation Engineer

AI Ansys Asic GPU Perforce +4 skills

Responsible for GPU HW development environment tool/flow maintenance and database (perforce) management. Effectively support DE/DV smooth development. Requirements Minimum two years experience, MS/BS degree in EE/CS…

<GPU>GPU HW Design Engineer

Asic C++ GPU Rtl Signal Processing +2 skills

Role and Responsibilities •_x0001_Collaborate with architects and design leads to define and document micro architecture of sub-modules of shader subsystem •_x0001_RTL coding and deliver high quality scalable design to…

<GPU>GPU HW Micro-Architecture Engineer

AI API C++ GPU Image Processing +4 skills

Role and Responsibilities •_x0001_Responsible for GPU cluster uArch specification, PPA (power, performance and area) optimization for industry-leading GPU hardware IP •_x0001_Collaborate with Arch/Model/SW team,…

VSOC Integration Assistance (Contractor)

Automation C Linux Python

1. Responsible for establishing and improving software engineering relevant systems and automation mechanism 2. Responsible for improving software configuration management systems 3. Responsible for improving release…

System software engineer_Hsinchu

C++ Linux Signal Processing

1. Software development of Embedded system with peripheral or multimedia. 2. Customized chip verification. 3. System application, optimization, and issue analysis. Requirements 1. Familiar with C/C++ 2. Familiar with…

Communication System Software Engineer

AI Anomaly Detection Automation C++ Python +1 skills

1)_x0001_Design and define the end-to-end architecture of the Data Capture Controlling System for system behavior analysis, performance optimization and issue resolve in advanced modem system, such as 4G, 5G, and 6G.…

Digital IC Design Engineer_Multimedia_Taipei

1. Digital IC Design 2. Multimedia IC Design 3. System Integration Requirements 1. Familiar with digital IC design 2. Experienced in SOC architecture or FPGA verification 3. Experienced in video/image processing is a…

FPGA Image Processing

CPU Post-Silicon HW Design Validation

Assembly Perl Python SystemVerilog Verilog

Based on different CPU architectures used in different product lines, deliver: * Test pattern plan to cover system bring up to MP (CP/FT, system test, DVT, HQA, correlation, DPPM reduction) * Develop…

<Data Center>DFT Architect for Data Center ASIC products

FPGA Oscilloscope Verilog

We are looking for candidates that can communicate complex engineering subjects effectively to cross functioning technical teams and upper management. Strong DFT and leadership skills will be put to good use.…

USB4 controller development designer/Architect

1. USB4 Controller Development 2. Short term => Improve current design quality of USB4 controller 3. Long term => Next gen USB4 controller architecture define and implementation Requirements 1. Experience in USB4…

PCIe Rtl

HSI (High-Speed Interface) PHY System Design Validation Engineer